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2e17caf317
While the suffix isn't required to disambiguate the instructions, it is required in order to parse the instructions when the suffix is specified in order to match the GNU assembler. llvm-svn: 322354
75 lines
2.4 KiB
LLVM
75 lines
2.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+tbm < %s | FileCheck %s
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define i32 @test_x86_tbm_bextri_u32(i32 %a) nounwind readnone {
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; CHECK-LABEL: test_x86_tbm_bextri_u32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: bextrl $2814, %edi, %eax # imm = 0xAFE
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; CHECK-NEXT: retq
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entry:
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%0 = tail call i32 @llvm.x86.tbm.bextri.u32(i32 %a, i32 2814)
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ret i32 %0
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}
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declare i32 @llvm.x86.tbm.bextri.u32(i32, i32) nounwind readnone
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define i32 @test_x86_tbm_bextri_u32_m(i32* nocapture %a) nounwind readonly {
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; CHECK-LABEL: test_x86_tbm_bextri_u32_m:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: bextrl $2814, (%rdi), %eax # imm = 0xAFE
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; CHECK-NEXT: retq
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entry:
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%tmp1 = load i32, i32* %a, align 4
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%0 = tail call i32 @llvm.x86.tbm.bextri.u32(i32 %tmp1, i32 2814)
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ret i32 %0
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}
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define i32 @test_x86_tbm_bextri_u32_z(i32 %a, i32 %b) nounwind readonly {
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; CHECK-LABEL: test_x86_tbm_bextri_u32_z:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: bextrl $2814, %edi, %eax # imm = 0xAFE
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; CHECK-NEXT: cmovel %esi, %eax
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; CHECK-NEXT: retq
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entry:
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%0 = tail call i32 @llvm.x86.tbm.bextri.u32(i32 %a, i32 2814)
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%1 = icmp eq i32 %0, 0
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%2 = select i1 %1, i32 %b, i32 %0
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ret i32 %2
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}
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define i64 @test_x86_tbm_bextri_u64(i64 %a) nounwind readnone {
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; CHECK-LABEL: test_x86_tbm_bextri_u64:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: bextrq $2814, %rdi, %rax # imm = 0xAFE
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; CHECK-NEXT: retq
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entry:
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%0 = tail call i64 @llvm.x86.tbm.bextri.u64(i64 %a, i64 2814)
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ret i64 %0
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}
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declare i64 @llvm.x86.tbm.bextri.u64(i64, i64) nounwind readnone
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define i64 @test_x86_tbm_bextri_u64_m(i64* nocapture %a) nounwind readonly {
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; CHECK-LABEL: test_x86_tbm_bextri_u64_m:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: bextrq $2814, (%rdi), %rax # imm = 0xAFE
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; CHECK-NEXT: retq
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entry:
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%tmp1 = load i64, i64* %a, align 8
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%0 = tail call i64 @llvm.x86.tbm.bextri.u64(i64 %tmp1, i64 2814)
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ret i64 %0
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}
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define i64 @test_x86_tbm_bextri_u64_z(i64 %a, i64 %b) nounwind readnone {
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; CHECK-LABEL: test_x86_tbm_bextri_u64_z:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: bextrq $2814, %rdi, %rax # imm = 0xAFE
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; CHECK-NEXT: cmoveq %rsi, %rax
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; CHECK-NEXT: retq
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entry:
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%0 = tail call i64 @llvm.x86.tbm.bextri.u64(i64 %a, i64 2814)
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%1 = icmp eq i64 %0, 0
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%2 = select i1 %1, i64 %b, i64 %0
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ret i64 %2
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}
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