Rafael Espindola 8b4b8109e9 Simplify handling of hidden stubs on PowerPC. ...

We now handle them just like non hidden ones. This was already the case
on x86 (r207518) and arm (r207517).

llvm-svn: 270205

2016-05-20 12:00:52 +00:00

..

AArch64

[ARM, AArch64] Match additional patterns to ldN instructions

2016-05-19 21:39:00 +00:00

AMDGPU

AMDGPU: Fix promote alloca for pointer loads

2016-05-18 23:20:24 +00:00

ARM

[ARM, AArch64] Match additional patterns to ldN instructions

2016-05-19 21:39:00 +00:00

BPF

[llc] New diagnostic handler

2016-05-16 14:28:02 +00:00

Generic

…

Hexagon

When looking for a spill slot in reg scavenger, find one that matches RC

2016-05-18 18:16:00 +00:00

Inputs

…

Lanai

…

Mips

[mips][mips16] Fix ZERO is not a CPU16Regs register error from the machine verifier.

2016-05-19 10:42:14 +00:00

MIR

[llc] New diagnostic handler

2016-05-16 14:28:02 +00:00

MSP430

…

NVPTX

…

PowerPC

Simplify handling of hidden stubs on PowerPC.

2016-05-20 12:00:52 +00:00

SPARC

[Sparc] Enable more inline assembly constraints.

2016-05-20 09:03:01 +00:00

SystemZ

[SystemZ] Fix register ordering for BinaryRRF instructions

2016-05-18 13:24:57 +00:00

Thumb

…

Thumb2

…

WebAssembly

[WebAssembly] Make several CHECK lines less fragile using regexes and CHECK-DAG.

2016-05-19 01:52:56 +00:00

WinEH

…

X86

[X86] Run the AVX/AVX2 intrinsic tests in AVX512VL mode too just to make sure we don't break any older intrinsics.

2016-05-20 05:10:32 +00:00

XCore

…