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0ac693a89e
- Allocate MachineMemOperands and MachineMemOperand lists in MachineFunctions. This eliminates MachineInstr's std::list member and allows the data to be created by isel and live for the remainder of codegen, avoiding a lot of copying and unnecessary translation. This also shrinks MemSDNode. - Delete MemOperandSDNode. Introduce MachineSDNode which has dedicated fields for MachineMemOperands. - Change MemSDNode to have a MachineMemOperand member instead of its own fields with the same information. This introduces some redundancy, but it's more consistent with what MachineInstr will eventually want. - Ignore alignment when searching for redundant loads for CSE, but remember the greatest alignment. Target-specific code which previously used MemOperandSDNodes with generic SDNodes now use MemIntrinsicSDNodes, with opcodes in a designated range so that the SelectionDAG framework knows that MachineMemOperand information is available. llvm-svn: 82794
129 lines
4.3 KiB
C++
129 lines
4.3 KiB
C++
//===- SystemZInstrBuilder.h - Functions to aid building insts -*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file exposes functions that may be used with BuildMI from the
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// MachineInstrBuilder.h file to handle SystemZ'isms in a clean way.
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//
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// The BuildMem function may be used with the BuildMI function to add entire
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// memory references in a single, typed, function call.
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//
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// For reference, the order of operands for memory references is:
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// (Operand), Base, Displacement, Index.
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//
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//===----------------------------------------------------------------------===//
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#ifndef SYSTEMZINSTRBUILDER_H
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#define SYSTEMZINSTRBUILDER_H
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineMemOperand.h"
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#include "llvm/CodeGen/PseudoSourceValue.h"
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namespace llvm {
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/// SystemZAddressMode - This struct holds a generalized full x86 address mode.
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/// The base register can be a frame index, which will eventually be replaced
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/// with R15 or R11 and Disp being offsetted accordingly.
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struct SystemZAddressMode {
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enum {
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RegBase,
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FrameIndexBase
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} BaseType;
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union {
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unsigned Reg;
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int FrameIndex;
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} Base;
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unsigned IndexReg;
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int32_t Disp;
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GlobalValue *GV;
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SystemZAddressMode() : BaseType(RegBase), IndexReg(0), Disp(0) {
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Base.Reg = 0;
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}
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};
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/// addDirectMem - This function is used to add a direct memory reference to the
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/// current instruction -- that is, a dereference of an address in a register,
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/// with no index or displacement.
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///
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static inline const MachineInstrBuilder &
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addDirectMem(const MachineInstrBuilder &MIB, unsigned Reg) {
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// Because memory references are always represented with 3
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// values, this adds: Reg, [0, NoReg] to the instruction.
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return MIB.addReg(Reg).addImm(0).addReg(0);
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}
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static inline const MachineInstrBuilder &
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addOffset(const MachineInstrBuilder &MIB, int Offset) {
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return MIB.addImm(Offset).addReg(0);
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}
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/// addRegOffset - This function is used to add a memory reference of the form
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/// [Reg + Offset], i.e., one with no or index, but with a
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/// displacement. An example is: 10(%r15).
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///
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static inline const MachineInstrBuilder &
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addRegOffset(const MachineInstrBuilder &MIB,
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unsigned Reg, bool isKill, int Offset) {
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return addOffset(MIB.addReg(Reg, getKillRegState(isKill)), Offset);
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}
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/// addRegReg - This function is used to add a memory reference of the form:
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/// [Reg + Reg].
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static inline const MachineInstrBuilder &
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addRegReg(const MachineInstrBuilder &MIB,
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unsigned Reg1, bool isKill1, unsigned Reg2, bool isKill2) {
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return MIB.addReg(Reg1, getKillRegState(isKill1)).addImm(0)
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.addReg(Reg2, getKillRegState(isKill2));
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}
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static inline const MachineInstrBuilder &
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addFullAddress(const MachineInstrBuilder &MIB, const SystemZAddressMode &AM) {
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if (AM.BaseType == SystemZAddressMode::RegBase)
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MIB.addReg(AM.Base.Reg);
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else if (AM.BaseType == SystemZAddressMode::FrameIndexBase)
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MIB.addFrameIndex(AM.Base.FrameIndex);
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else
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assert(0);
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return MIB.addImm(AM.Disp).addReg(AM.IndexReg);
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}
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/// addFrameReference - This function is used to add a reference to the base of
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/// an abstract object on the stack frame of the current function. This
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/// reference has base register as the FrameIndex offset until it is resolved.
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/// This allows a constant offset to be specified as well...
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///
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static inline const MachineInstrBuilder &
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addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0) {
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MachineInstr *MI = MIB;
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MachineFunction &MF = *MI->getParent()->getParent();
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MachineFrameInfo &MFI = *MF.getFrameInfo();
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const TargetInstrDesc &TID = MI->getDesc();
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unsigned Flags = 0;
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if (TID.mayLoad())
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Flags |= MachineMemOperand::MOLoad;
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if (TID.mayStore())
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Flags |= MachineMemOperand::MOStore;
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MachineMemOperand *MMO =
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MF.getMachineMemOperand(PseudoSourceValue::getFixedStack(FI),
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Flags, Offset,
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MFI.getObjectSize(FI),
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MFI.getObjectAlignment(FI));
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return addOffset(MIB.addFrameIndex(FI), Offset)
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.addMemOperand(MMO);
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}
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} // End llvm namespace
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#endif
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