Colin LeMahieu 9363870e8a [Hexagon] Adding locked loads. ... llvm-svn: 224870		2014-12-26 20:42:27 +00:00
..
AArch64
ARM	Add support for ARM modified-immediate assembly syntax.	2014-12-02 10:53:20 +00:00
Hexagon	[Hexagon] Adding locked loads.	2014-12-26 20:42:27 +00:00
Mips	[mips][microMIPS] Implement CACHE, PREF, SSNOP, EHB and PAUSE instructions	2014-12-23 19:55:34 +00:00
PowerPC	[PowerPC] Add asm support for cache-inhibited ld/st instructions	2014-11-30 10:15:56 +00:00
Sparc
SystemZ
X86	[X86] Add the debug registers DR8-DR15 so we can assemble and disassemble references to them.	2014-12-26 18:20:05 +00:00
XCore