mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-12-08 20:18:33 +00:00
5f32a8dbc4
Currently a vector move of 0 or -1 will use different instructions depending on the size of the vector. Using a single instruction (the 128-bit one) for both gives more opportunity for Machine CSE to eliminate instructions. Differential Revision: https://reviews.llvm.org/D53579 llvm-svn: 345270
13 lines
426 B
LLVM
13 lines
426 B
LLVM
; RUN: llc -mtriple=aarch64-none-linux-gnu < %s -o -| FileCheck %s
|
|
|
|
; Function Attrs: nounwind readnone
|
|
declare <4 x i16> @llvm.aarch64.neon.smax.v4i16(<4 x i16>, <4 x i16>)
|
|
|
|
; CHECK-LABEL: test
|
|
define <4 x i16> @test() {
|
|
entry:
|
|
; CHECK: movi v{{[0-9]+}}.2d, #0000000000000000
|
|
%0 = tail call <4 x i16> @llvm.aarch64.neon.smax.v4i16(<4 x i16> <i16 -1, i16 -1, i16 -1, i16 -1>, <4 x i16> zeroinitializer)
|
|
ret <4 x i16> %0
|
|
}
|