mirror of
https://github.com/RPCS3/llvm-mirror.git
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ef0d5db760
Get rid of the "; mem:" suffix and use the one we use in MIR: ":: (load 2)". rdar://38163529 Differential Revision: https://reviews.llvm.org/D42377 llvm-svn: 327580
150 lines
5.8 KiB
LLVM
150 lines
5.8 KiB
LLVM
; REQUIRES: asserts
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; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a57 -verify-misched -debug-only=machine-scheduler -aarch64-enable-stp-suppress=false -o - 2>&1 > /dev/null | FileCheck %s
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; CHECK: ********** MI Scheduling **********
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; CHECK-LABEL: stp_i64_scale:%bb.0
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; CHECK:Cluster ld/st SU(4) - SU(3)
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; CHECK:Cluster ld/st SU(2) - SU(5)
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; CHECK:SU(4): STRXui %1:gpr64, %0:gpr64common, 1
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; CHECK:SU(3): STRXui %1:gpr64, %0:gpr64common, 2
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; CHECK:SU(2): STRXui %1:gpr64, %0:gpr64common, 3
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; CHECK:SU(5): STRXui %1:gpr64, %0:gpr64common, 4
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define i64 @stp_i64_scale(i64* nocapture %P, i64 %v) {
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entry:
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%arrayidx = getelementptr inbounds i64, i64* %P, i64 3
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store i64 %v, i64* %arrayidx
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%arrayidx1 = getelementptr inbounds i64, i64* %P, i64 2
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store i64 %v, i64* %arrayidx1
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%arrayidx2 = getelementptr inbounds i64, i64* %P, i64 1
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store i64 %v, i64* %arrayidx2
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%arrayidx3 = getelementptr inbounds i64, i64* %P, i64 4
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store i64 %v, i64* %arrayidx3
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ret i64 %v
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}
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; CHECK: ********** MI Scheduling **********
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; CHECK-LABEL: stp_i32_scale:%bb.0
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; CHECK:Cluster ld/st SU(4) - SU(3)
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; CHECK:Cluster ld/st SU(2) - SU(5)
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; CHECK:SU(4): STRWui %1:gpr32, %0:gpr64common, 1
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; CHECK:SU(3): STRWui %1:gpr32, %0:gpr64common, 2
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; CHECK:SU(2): STRWui %1:gpr32, %0:gpr64common, 3
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; CHECK:SU(5): STRWui %1:gpr32, %0:gpr64common, 4
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define i32 @stp_i32_scale(i32* nocapture %P, i32 %v) {
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entry:
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%arrayidx = getelementptr inbounds i32, i32* %P, i32 3
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store i32 %v, i32* %arrayidx
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%arrayidx1 = getelementptr inbounds i32, i32* %P, i32 2
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store i32 %v, i32* %arrayidx1
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%arrayidx2 = getelementptr inbounds i32, i32* %P, i32 1
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store i32 %v, i32* %arrayidx2
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%arrayidx3 = getelementptr inbounds i32, i32* %P, i32 4
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store i32 %v, i32* %arrayidx3
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ret i32 %v
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}
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; CHECK:********** MI Scheduling **********
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; CHECK-LABEL:stp_i64_unscale:%bb.0 entry
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; CHECK:Cluster ld/st SU(5) - SU(2)
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; CHECK:Cluster ld/st SU(4) - SU(3)
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; CHECK:SU(5): STURXi %1:gpr64, %0:gpr64common, -32
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; CHECK:SU(2): STURXi %1:gpr64, %0:gpr64common, -24
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; CHECK:SU(4): STURXi %1:gpr64, %0:gpr64common, -16
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; CHECK:SU(3): STURXi %1:gpr64, %0:gpr64common, -8
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define void @stp_i64_unscale(i64* nocapture %P, i64 %v) #0 {
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entry:
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%arrayidx = getelementptr inbounds i64, i64* %P, i64 -3
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store i64 %v, i64* %arrayidx
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%arrayidx1 = getelementptr inbounds i64, i64* %P, i64 -1
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store i64 %v, i64* %arrayidx1
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%arrayidx2 = getelementptr inbounds i64, i64* %P, i64 -2
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store i64 %v, i64* %arrayidx2
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%arrayidx3 = getelementptr inbounds i64, i64* %P, i64 -4
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store i64 %v, i64* %arrayidx3
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ret void
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}
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; CHECK:********** MI Scheduling **********
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; CHECK-LABEL:stp_i32_unscale:%bb.0 entry
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; CHECK:Cluster ld/st SU(5) - SU(2)
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; CHECK:Cluster ld/st SU(4) - SU(3)
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; CHECK:SU(5): STURWi %1:gpr32, %0:gpr64common, -16
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; CHECK:SU(2): STURWi %1:gpr32, %0:gpr64common, -12
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; CHECK:SU(4): STURWi %1:gpr32, %0:gpr64common, -8
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; CHECK:SU(3): STURWi %1:gpr32, %0:gpr64common, -4
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define void @stp_i32_unscale(i32* nocapture %P, i32 %v) #0 {
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entry:
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%arrayidx = getelementptr inbounds i32, i32* %P, i32 -3
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store i32 %v, i32* %arrayidx
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%arrayidx1 = getelementptr inbounds i32, i32* %P, i32 -1
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store i32 %v, i32* %arrayidx1
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%arrayidx2 = getelementptr inbounds i32, i32* %P, i32 -2
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store i32 %v, i32* %arrayidx2
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%arrayidx3 = getelementptr inbounds i32, i32* %P, i32 -4
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store i32 %v, i32* %arrayidx3
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ret void
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}
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; CHECK:********** MI Scheduling **********
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; CHECK-LABEL:stp_double:%bb.0
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; CHECK:Cluster ld/st SU(3) - SU(4)
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; CHECK:Cluster ld/st SU(2) - SU(5)
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; CHECK:SU(3): STRDui %1:fpr64, %0:gpr64common, 1
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; CHECK:SU(4): STRDui %1:fpr64, %0:gpr64common, 2
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; CHECK:SU(2): STRDui %1:fpr64, %0:gpr64common, 3
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; CHECK:SU(5): STRDui %1:fpr64, %0:gpr64common, 4
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define void @stp_double(double* nocapture %P, double %v) {
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entry:
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%arrayidx = getelementptr inbounds double, double* %P, i64 3
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store double %v, double* %arrayidx
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%arrayidx1 = getelementptr inbounds double, double* %P, i64 1
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store double %v, double* %arrayidx1
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%arrayidx2 = getelementptr inbounds double, double* %P, i64 2
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store double %v, double* %arrayidx2
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%arrayidx3 = getelementptr inbounds double, double* %P, i64 4
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store double %v, double* %arrayidx3
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ret void
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}
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; CHECK:********** MI Scheduling **********
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; CHECK-LABEL:stp_float:%bb.0
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; CHECK:Cluster ld/st SU(3) - SU(4)
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; CHECK:Cluster ld/st SU(2) - SU(5)
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; CHECK:SU(3): STRSui %1:fpr32, %0:gpr64common, 1
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; CHECK:SU(4): STRSui %1:fpr32, %0:gpr64common, 2
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; CHECK:SU(2): STRSui %1:fpr32, %0:gpr64common, 3
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; CHECK:SU(5): STRSui %1:fpr32, %0:gpr64common, 4
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define void @stp_float(float* nocapture %P, float %v) {
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entry:
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%arrayidx = getelementptr inbounds float, float* %P, i64 3
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store float %v, float* %arrayidx
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%arrayidx1 = getelementptr inbounds float, float* %P, i64 1
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store float %v, float* %arrayidx1
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%arrayidx2 = getelementptr inbounds float, float* %P, i64 2
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store float %v, float* %arrayidx2
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%arrayidx3 = getelementptr inbounds float, float* %P, i64 4
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store float %v, float* %arrayidx3
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ret void
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}
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; CHECK: ********** MI Scheduling **********
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; CHECK-LABEL: stp_volatile:%bb.0
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; CHECK-NOT: Cluster ld/st
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; CHECK:SU(2): STRXui %1:gpr64, %0:gpr64common, 3 :: (volatile
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; CHECK:SU(3): STRXui %1:gpr64, %0:gpr64common, 2 :: (volatile
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; CHECK:SU(4): STRXui %1:gpr64, %0:gpr64common, 1 :: (volatile
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; CHECK:SU(5): STRXui %1:gpr64, %0:gpr64common, 4 :: (volatile
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define i64 @stp_volatile(i64* nocapture %P, i64 %v) {
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entry:
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%arrayidx = getelementptr inbounds i64, i64* %P, i64 3
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store volatile i64 %v, i64* %arrayidx
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%arrayidx1 = getelementptr inbounds i64, i64* %P, i64 2
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store volatile i64 %v, i64* %arrayidx1
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%arrayidx2 = getelementptr inbounds i64, i64* %P, i64 1
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store volatile i64 %v, i64* %arrayidx2
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%arrayidx3 = getelementptr inbounds i64, i64* %P, i64 4
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store volatile i64 %v, i64* %arrayidx3
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ret i64 %v
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}
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