llvm-mirror/test/CodeGen/AArch64/arm64-fast-isel-materialize.ll
Amara Emerson bbc71b8057 [AArch64][GlobalISel] Enable GlobalISel at -O0 by default
Tests updated to explicitly use fast-isel at -O0 instead of implicitly.

This change also allows an explicit -fast-isel option to override an
implicitly enabled global-isel. Otherwise -fast-isel would have no effect at -O0.

Differential Revision: https://reviews.llvm.org/D41362

llvm-svn: 321655
2018-01-02 16:30:47 +00:00

42 lines
1.0 KiB
LLVM

; RUN: llc -O0 -fast-isel -fast-isel-abort=1 -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s
; Materialize using fmov
define float @fmov_float1() {
; CHECK-LABEL: fmov_float1
; CHECK: fmov s0, #1.25000000
ret float 1.250000e+00
}
define float @fmov_float2() {
; CHECK-LABEL: fmov_float2
; CHECK: fmov s0, wzr
ret float 0.0e+00
}
define double @fmov_double1() {
; CHECK-LABEL: fmov_double1
; CHECK: fmov d0, #1.25000000
ret double 1.250000e+00
}
define double @fmov_double2() {
; CHECK-LABEL: fmov_double2
; CHECK: fmov d0, xzr
ret double 0.0e+00
}
; Materialize from constant pool
define float @cp_float() {
; CHECK-LABEL: cp_float
; CHECK: adrp [[REG:x[0-9]+]], {{lCPI[0-9]+_0}}@PAGE
; CHECK-NEXT: ldr s0, {{\[}}[[REG]], {{lCPI[0-9]+_0}}@PAGEOFF{{\]}}
ret float 0x400921FB60000000
}
define double @cp_double() {
; CHECK-LABEL: cp_double
; CHECK: adrp [[REG:x[0-9]+]], {{lCPI[0-9]+_0}}@PAGE
; CHECK-NEXT: ldr d0, {{\[}}[[REG]], {{lCPI[0-9]+_0}}@PAGEOFF{{\]}}
ret double 0x400921FB54442D18
}