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https://github.com/RPCS3/llvm-mirror.git
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91bb437eb8
As discussed on PR27654, this patch fixes the triples of a lot of aarch64 tests and enables lit tests on windows This will hopefully help stop cases where windows developers break the aarch64 target Differential Revision: https://reviews.llvm.org/D22191 llvm-svn: 275973
153 lines
3.7 KiB
LLVM
153 lines
3.7 KiB
LLVM
; RUN: llc < %s -mtriple=arm64-eabi | FileCheck %s
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; rdar://9296808
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; rdar://9349137
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define i128 @t1(i64 %a, i64 %b) nounwind readnone ssp {
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entry:
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; CHECK-LABEL: t1:
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; CHECK: mul {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}
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; CHECK: umulh {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}
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%tmp1 = zext i64 %a to i128
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%tmp2 = zext i64 %b to i128
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%tmp3 = mul i128 %tmp1, %tmp2
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ret i128 %tmp3
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}
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define i128 @t2(i64 %a, i64 %b) nounwind readnone ssp {
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entry:
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; CHECK-LABEL: t2:
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; CHECK: mul {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}
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; CHECK: smulh {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}
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%tmp1 = sext i64 %a to i128
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%tmp2 = sext i64 %b to i128
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%tmp3 = mul i128 %tmp1, %tmp2
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ret i128 %tmp3
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}
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define i64 @t3(i32 %a, i32 %b) nounwind {
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entry:
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; CHECK-LABEL: t3:
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; CHECK: umull {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
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%tmp1 = zext i32 %a to i64
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%tmp2 = zext i32 %b to i64
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%tmp3 = mul i64 %tmp1, %tmp2
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ret i64 %tmp3
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}
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define i64 @t4(i32 %a, i32 %b) nounwind {
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entry:
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; CHECK-LABEL: t4:
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; CHECK: smull {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
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%tmp1 = sext i32 %a to i64
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%tmp2 = sext i32 %b to i64
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%tmp3 = mul i64 %tmp1, %tmp2
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ret i64 %tmp3
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}
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define i64 @t5(i32 %a, i32 %b, i64 %c) nounwind {
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entry:
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; CHECK-LABEL: t5:
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; CHECK: umaddl {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, {{x[0-9]+}}
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%tmp1 = zext i32 %a to i64
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%tmp2 = zext i32 %b to i64
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%tmp3 = mul i64 %tmp1, %tmp2
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%tmp4 = add i64 %c, %tmp3
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ret i64 %tmp4
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}
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define i64 @t6(i32 %a, i32 %b, i64 %c) nounwind {
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entry:
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; CHECK-LABEL: t6:
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; CHECK: smsubl {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, {{x[0-9]+}}
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%tmp1 = sext i32 %a to i64
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%tmp2 = sext i32 %b to i64
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%tmp3 = mul i64 %tmp1, %tmp2
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%tmp4 = sub i64 %c, %tmp3
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ret i64 %tmp4
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}
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define i64 @t7(i32 %a, i32 %b) nounwind {
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entry:
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; CHECK-LABEL: t7:
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; CHECK: umnegl {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
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%tmp1 = zext i32 %a to i64
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%tmp2 = zext i32 %b to i64
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%tmp3 = mul i64 %tmp1, %tmp2
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%tmp4 = sub i64 0, %tmp3
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ret i64 %tmp4
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}
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define i64 @t8(i32 %a, i32 %b) nounwind {
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entry:
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; CHECK-LABEL: t8:
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; CHECK: smnegl {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
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%tmp1 = sext i32 %a to i64
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%tmp2 = sext i32 %b to i64
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%tmp3 = mul i64 %tmp1, %tmp2
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%tmp4 = sub i64 0, %tmp3
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ret i64 %tmp4
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}
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define i64 @t9(i32 %a) nounwind {
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entry:
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; CHECK-LABEL: t9:
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; CHECK: umull {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
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%tmp1 = zext i32 %a to i64
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%tmp2 = mul i64 %tmp1, 139968
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ret i64 %tmp2
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}
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; Check 64-bit multiplication is used for constants > 32 bits.
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define i64 @t10(i32 %a) nounwind {
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entry:
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; CHECK-LABEL: t10:
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; CHECK: mul {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}
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%tmp1 = sext i32 %a to i64
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%tmp2 = mul i64 %tmp1, 2147483650 ; = 2^31 + 2
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ret i64 %tmp2
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}
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; Check the sext_inreg case.
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define i64 @t11(i64 %a) nounwind {
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entry:
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; CHECK-LABEL: t11:
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; CHECK: smnegl {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
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%tmp1 = trunc i64 %a to i32
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%tmp2 = sext i32 %tmp1 to i64
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%tmp3 = mul i64 %tmp2, -2395238
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%tmp4 = sub i64 0, %tmp3
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ret i64 %tmp4
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}
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define i64 @t12(i64 %a, i64 %b) nounwind {
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entry:
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; CHECK-LABEL: t12:
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; CHECK: smaddl {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, {{x[0-9]+}}
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%tmp1 = trunc i64 %a to i32
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%tmp2 = sext i32 %tmp1 to i64
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%tmp3 = mul i64 %tmp2, -34567890
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%tmp4 = add i64 %b, %tmp3
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ret i64 %tmp4
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}
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define i64 @t13(i32 %a, i64 %b) nounwind {
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entry:
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; CHECK-LABEL: t13:
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; CHECK: umsubl {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, {{x[0-9]+}}
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%tmp1 = zext i32 %a to i64
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%tmp3 = mul i64 %tmp1, 12345678
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%tmp4 = sub i64 %b, %tmp3
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ret i64 %tmp4
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}
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define i64 @t14(i32 %a, i64 %b) nounwind {
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entry:
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; CHECK-LABEL: t14:
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; CHECK: smsubl {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, {{x[0-9]+}}
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%tmp1 = sext i32 %a to i64
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%tmp3 = mul i64 %tmp1, -12345678
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%tmp4 = sub i64 %b, %tmp3
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ret i64 %tmp4
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}
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