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14c4d9c7b3
Summary: Reserving registers x1-7 is used to support CONFIG_ARM64_LSE_ATOMICS in Linux kernel. This change adds support for reserving registers x1 through x7. Reviewers: javed.absar, phosek, srhines, nickdesaulniers, efriedma Reviewed By: nickdesaulniers, efriedma Subscribers: niravd, jfb, manojgupta, nickdesaulniers, jyknight, efriedma, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D48580 llvm-svn: 341706
20 lines
786 B
LLVM
20 lines
786 B
LLVM
; RUN: not llc < %s -mtriple=arm64-linux-gnu -mattr=+reserve-x1 2>&1 | FileCheck %s
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; RUN: not llc < %s -mtriple=arm64-linux-gnu -mattr=+reserve-x1 -fast-isel 2>&1 | FileCheck %s
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; RUN: not llc < %s -mtriple=arm64-linux-gnu -mattr=+reserve-x1 -global-isel 2>&1 | FileCheck %s
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; CHECK: error:
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; CHECK-SAME: AArch64 doesn't support function calls if any of the argument registers is reserved.
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define void @call_function() {
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call void @foo()
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ret void
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}
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declare void @foo()
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; CHECK: error:
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; CHECK-SAME: AArch64 doesn't support function calls if any of the argument registers is reserved.
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define void @call_memcpy(i8* %out, i8* %in) {
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* %out, i8* %in, i64 800, i1 false)
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ret void
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}
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declare void @llvm.memcpy.p0i8.p0i8.i64(i8*, i8*, i64, i1)
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