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d4c615be8c
Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
31 lines
978 B
YAML
31 lines
978 B
YAML
# RUN: llc -mtriple=aarch64--linux-gnu -run-pass=aarch64-ldst-opt %s -verify-machineinstrs -o - | FileCheck %s
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--- |
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define void @ldr_str_aa(i32* noalias nocapture %x, i32* noalias nocapture readonly %y) {
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entry:
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%0 = load i32, i32* %y, align 4
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store i32 %0, i32* %x, align 4
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%arrayidx2 = getelementptr inbounds i32, i32* %y, i32 1
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%1 = load i32, i32* %arrayidx2, align 4
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%arrayidx3 = getelementptr inbounds i32, i32* %x, i32 1
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store i32 %1, i32* %arrayidx3, align 4
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ret void
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}
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...
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---
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# CHECK-LABEL: name: ldr_str_aa
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# CHECK: $w8, $w9 = LDPWi $x1, 0
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# CHECK: STPWi $w8, $w9, $x0, 0
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name: ldr_str_aa
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $x0, $x1
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$w8 = LDRWui $x1, 0 :: (load 4 from %ir.y)
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STRWui killed $w8, $x0, 0 :: (store 4 into %ir.x)
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$w9 = LDRWui killed $x1, 1 :: (load 4 from %ir.arrayidx2)
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STRWui killed $w9, killed $x0, 1 :: (store 4 into %ir.arrayidx3)
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RET undef $lr
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