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Without this patch, register allocation for the example below fails. define half @test(half %a1, half %a2) #0 { entry: %0 = tail call half asm "sqrshl ${0:h}, ${1:h}, ${2:h}", "=w,w,w" (half %a1, half %a2) #1 ret half %0 } Patch by Florian Hahn. Differential Revision: https://reviews.llvm.org/D25080 llvm-svn: 286111
21 lines
587 B
LLVM
21 lines
587 B
LLVM
; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon < %s | FileCheck %s
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; generated from
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; __fp16 test(__fp16 a1, __fp16 a2) {
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; __fp16 res0;
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; __asm__("sqrshl %h[__res], %h[__A], %h[__B]"
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; : [__res] "=w" (res0)
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; : [__A] "w" (a1), [__B] "w" (a2)
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; :
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; );
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; return res0;
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;}
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; Function Attrs: nounwind readnone
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define half @test(half %a1, half %a2) #0 {
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entry:
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;CHECK: sqrshl {{h[0-9]+}}, {{h[0-9]+}}, {{h[0-9]+}}
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%0 = tail call half asm "sqrshl ${0:h}, ${1:h}, ${2:h}", "=w,w,w" (half %a1, half %a2) #1
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ret half %0
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}
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