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30264d4391
As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
129 lines
3.4 KiB
LLVM
129 lines
3.4 KiB
LLVM
; RUN: llc < %s -mtriple=aarch64-unknown-unknown | FileCheck %s
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; Compare if negative and select of constants where one constant is zero.
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define i32 @neg_sel_constants(i32 %a) {
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; CHECK-LABEL: neg_sel_constants:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #5
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; CHECK-NEXT: and w0, w8, w0, asr #31
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; CHECK-NEXT: ret
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;
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%tmp.1 = icmp slt i32 %a, 0
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%retval = select i1 %tmp.1, i32 5, i32 0
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ret i32 %retval
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}
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; Compare if negative and select of constants where one constant is zero and the other is a single bit.
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define i32 @neg_sel_special_constant(i32 %a) {
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; CHECK-LABEL: neg_sel_special_constant:
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; CHECK: // %bb.0:
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; CHECK-NEXT: lsr w8, w0, #22
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; CHECK-NEXT: and w0, w8, #0x200
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; CHECK-NEXT: ret
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;
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%tmp.1 = icmp slt i32 %a, 0
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%retval = select i1 %tmp.1, i32 512, i32 0
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ret i32 %retval
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}
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; Compare if negative and select variable or zero.
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define i32 @neg_sel_variable_and_zero(i32 %a, i32 %b) {
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; CHECK-LABEL: neg_sel_variable_and_zero:
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; CHECK: // %bb.0:
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; CHECK-NEXT: and w0, w1, w0, asr #31
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; CHECK-NEXT: ret
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;
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%tmp.1 = icmp slt i32 %a, 0
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%retval = select i1 %tmp.1, i32 %b, i32 0
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ret i32 %retval
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}
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; Compare if not positive and select the same variable as being compared: smin(a, 0).
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define i32 @not_pos_sel_same_variable(i32 %a) {
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; CHECK-LABEL: not_pos_sel_same_variable:
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; CHECK: // %bb.0:
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; CHECK-NEXT: and w0, w0, w0, asr #31
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; CHECK-NEXT: ret
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;
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%tmp = icmp slt i32 %a, 1
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%min = select i1 %tmp, i32 %a, i32 0
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ret i32 %min
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}
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; Flipping the comparison condition can be handled by getting the bitwise not of the sign mask.
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; Compare if positive and select of constants where one constant is zero.
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define i32 @pos_sel_constants(i32 %a) {
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; CHECK-LABEL: pos_sel_constants:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #5
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; CHECK-NEXT: bic w0, w8, w0, asr #31
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; CHECK-NEXT: ret
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;
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%tmp.1 = icmp sgt i32 %a, -1
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%retval = select i1 %tmp.1, i32 5, i32 0
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ret i32 %retval
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}
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; Compare if positive and select of constants where one constant is zero and the other is a single bit.
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define i32 @pos_sel_special_constant(i32 %a) {
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; CHECK-LABEL: pos_sel_special_constant:
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; CHECK: // %bb.0:
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; CHECK-NEXT: orr w8, wzr, #0x200
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; CHECK-NEXT: bic w0, w8, w0, lsr #22
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; CHECK-NEXT: ret
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;
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%tmp.1 = icmp sgt i32 %a, -1
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%retval = select i1 %tmp.1, i32 512, i32 0
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ret i32 %retval
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}
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; Compare if positive and select variable or zero.
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define i32 @pos_sel_variable_and_zero(i32 %a, i32 %b) {
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; CHECK-LABEL: pos_sel_variable_and_zero:
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; CHECK: // %bb.0:
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; CHECK-NEXT: bic w0, w1, w0, asr #31
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; CHECK-NEXT: ret
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;
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%tmp.1 = icmp sgt i32 %a, -1
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%retval = select i1 %tmp.1, i32 %b, i32 0
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ret i32 %retval
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}
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; Compare if not negative or zero and select the same variable as being compared: smax(a, 0).
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define i32 @not_neg_sel_same_variable(i32 %a) {
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; CHECK-LABEL: not_neg_sel_same_variable:
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; CHECK: // %bb.0:
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; CHECK-NEXT: bic w0, w0, w0, asr #31
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; CHECK-NEXT: ret
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;
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%tmp = icmp sgt i32 %a, 0
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%min = select i1 %tmp, i32 %a, i32 0
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ret i32 %min
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}
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; https://llvm.org/bugs/show_bug.cgi?id=31175
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; ret = (x-y) > 0 ? x-y : 0
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define i32 @PR31175(i32 %x, i32 %y) {
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; CHECK-LABEL: PR31175:
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; CHECK: // %bb.0:
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; CHECK-NEXT: sub w8, w0, w1
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; CHECK-NEXT: bic w0, w8, w8, asr #31
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; CHECK-NEXT: ret
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;
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%sub = sub nsw i32 %x, %y
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%cmp = icmp sgt i32 %sub, 0
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%sel = select i1 %cmp, i32 %sub, i32 0
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ret i32 %sel
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}
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