llvm-mirror/test/CodeGen/AArch64/special-reg.ll
Tim Northover 86fa0255b2 AArch64: TableGenerate system instruction operands.
The way the named arguments for various system instructions are handled at the
moment has a few problems:

  - Large-scale duplication between AArch64BaseInfo.h and AArch64BaseInfo.cpp
  - That weird Mapping class that I have no idea what I was on when I thought
    it was a good idea.
  - Searches are performed linearly through the entire list.
  - We print absolutely all registers in upper-case, even though some are
    canonically mixed case (SPSel for example).
  - The ARM ARM specifies sysregs in terms of 5 fields, but those are relegated
    to comments in our implementation, with a slightly opaque hex value
    indicating the canonical encoding LLVM will use.

This adds a new TableGen backend to produce efficiently searchable tables, and
switches AArch64 over to using that infrastructure.

llvm-svn: 274576
2016-07-05 21:23:04 +00:00

49 lines
1.1 KiB
LLVM

; RUN: llc < %s -mtriple=aarch64-none-eabi -mcpu=cortex-a57 2>&1 | FileCheck %s
define i64 @read_encoded_register() nounwind {
entry:
; CHECK-LABEL: read_encoded_register:
; CHECK: mrs x0, S1_2_C3_C4_5
%reg = call i64 @llvm.read_register.i64(metadata !0)
ret i64 %reg
}
define i64 @read_daif() nounwind {
entry:
; CHECK-LABEL: read_daif:
; CHECK: mrs x0, DAIF
%reg = call i64 @llvm.read_register.i64(metadata !1)
ret i64 %reg
}
define void @write_encoded_register(i64 %x) nounwind {
entry:
; CHECK-LABEL: write_encoded_register:
; CHECK: msr S1_2_C3_C4_5, x0
call void @llvm.write_register.i64(metadata !0, i64 %x)
ret void
}
define void @write_daif(i64 %x) nounwind {
entry:
; CHECK-LABEL: write_daif:
; CHECK: msr DAIF, x0
call void @llvm.write_register.i64(metadata !1, i64 %x)
ret void
}
define void @write_daifset() nounwind {
entry:
; CHECK-LABEL: write_daifset:
; CHECK: msr DAIFSet, #2
call void @llvm.write_register.i64(metadata !2, i64 2)
ret void
}
declare i64 @llvm.read_register.i64(metadata) nounwind
declare void @llvm.write_register.i64(metadata, i64) nounwind
!0 = !{!"1:2:3:4:5"}
!1 = !{!"daif"}
!2 = !{!"daifset"}