mirror of
https://github.com/RPCS3/llvm-mirror.git
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b563ad8227
Summary: This **appears** to be the last missing piece for the masked merge pattern handling in the backend. This is [[ https://bugs.llvm.org/show_bug.cgi?id=37104 | PR37104 ]]. [[ https://bugs.llvm.org/show_bug.cgi?id=6773 | PR6773 ]] will introduce an IR canonicalization that is likely bad for the end assembly. Previously, `andps`+`andnps` / `bsl` would be generated. (see `@out`) Now, they would no longer be generated (see `@in`), and we need to make sure that they are generated. Differential Revision: https://reviews.llvm.org/D46528 llvm-svn: 332904
228 lines
8.4 KiB
LLVM
228 lines
8.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s
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; ============================================================================ ;
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; Various cases with %x and/or %y being a constant
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; ============================================================================ ;
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define <4 x i32> @out_constant_varx_mone(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) {
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; CHECK-LABEL: out_constant_varx_mone:
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; CHECK: // %bb.0:
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; CHECK-NEXT: and v0.16b, v2.16b, v0.16b
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; CHECK-NEXT: orn v0.16b, v0.16b, v2.16b
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; CHECK-NEXT: ret
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%notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>
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%mx = and <4 x i32> %mask, %x
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%my = and <4 x i32> %notmask, <i32 -1, i32 -1, i32 -1, i32 -1>
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%r = or <4 x i32> %mx, %my
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ret <4 x i32> %r
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}
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define <4 x i32> @in_constant_varx_mone(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) {
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; CHECK-LABEL: in_constant_varx_mone:
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; CHECK: // %bb.0:
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; CHECK-NEXT: bic v0.16b, v2.16b, v0.16b
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; CHECK-NEXT: mvn v0.16b, v0.16b
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; CHECK-NEXT: ret
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%n0 = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1> ; %x
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%n1 = and <4 x i32> %n0, %mask
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%r = xor <4 x i32> %n1, <i32 -1, i32 -1, i32 -1, i32 -1>
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ret <4 x i32> %r
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}
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; This is not a canonical form. Testing for completeness only.
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define <4 x i32> @out_constant_varx_mone_invmask(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) {
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; CHECK-LABEL: out_constant_varx_mone_invmask:
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; CHECK: // %bb.0:
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; CHECK-NEXT: bic v0.16b, v0.16b, v2.16b
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; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b
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; CHECK-NEXT: ret
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%notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>
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%mx = and <4 x i32> %notmask, %x
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%my = and <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>
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%r = or <4 x i32> %mx, %my
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ret <4 x i32> %r
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}
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; This is not a canonical form. Testing for completeness only.
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define <4 x i32> @in_constant_varx_mone_invmask(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) {
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; CHECK-LABEL: in_constant_varx_mone_invmask:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mvn v0.16b, v0.16b
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; CHECK-NEXT: bic v0.16b, v0.16b, v2.16b
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; CHECK-NEXT: mvn v0.16b, v0.16b
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; CHECK-NEXT: ret
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%notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>
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%n0 = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1> ; %x
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%n1 = and <4 x i32> %n0, %notmask
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%r = xor <4 x i32> %n1, <i32 -1, i32 -1, i32 -1, i32 -1>
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ret <4 x i32> %r
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}
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define <4 x i32> @out_constant_varx_42(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) {
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; CHECK-LABEL: out_constant_varx_42:
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; CHECK: // %bb.0:
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; CHECK-NEXT: movi v1.4s, #42
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; CHECK-NEXT: bsl v2.16b, v0.16b, v1.16b
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; CHECK-NEXT: mov v0.16b, v2.16b
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; CHECK-NEXT: ret
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%notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>
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%mx = and <4 x i32> %mask, %x
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%my = and <4 x i32> %notmask, <i32 42, i32 42, i32 42, i32 42>
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%r = or <4 x i32> %mx, %my
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ret <4 x i32> %r
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}
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define <4 x i32> @in_constant_varx_42(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) {
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; CHECK-LABEL: in_constant_varx_42:
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; CHECK: // %bb.0:
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; CHECK-NEXT: movi v1.4s, #42
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; CHECK-NEXT: bsl v2.16b, v0.16b, v1.16b
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; CHECK-NEXT: mov v0.16b, v2.16b
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; CHECK-NEXT: ret
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%n0 = xor <4 x i32> %x, <i32 42, i32 42, i32 42, i32 42> ; %x
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%n1 = and <4 x i32> %n0, %mask
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%r = xor <4 x i32> %n1, <i32 42, i32 42, i32 42, i32 42>
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ret <4 x i32> %r
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}
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; This is not a canonical form. Testing for completeness only.
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define <4 x i32> @out_constant_varx_42_invmask(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) {
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; CHECK-LABEL: out_constant_varx_42_invmask:
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; CHECK: // %bb.0:
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; CHECK-NEXT: movi v1.4s, #42
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; CHECK-NEXT: bsl v2.16b, v1.16b, v0.16b
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; CHECK-NEXT: mov v0.16b, v2.16b
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; CHECK-NEXT: ret
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%notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>
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%mx = and <4 x i32> %notmask, %x
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%my = and <4 x i32> %mask, <i32 42, i32 42, i32 42, i32 42>
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%r = or <4 x i32> %mx, %my
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ret <4 x i32> %r
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}
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; This is not a canonical form. Testing for completeness only.
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define <4 x i32> @in_constant_varx_42_invmask(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) {
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; CHECK-LABEL: in_constant_varx_42_invmask:
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; CHECK: // %bb.0:
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; CHECK-NEXT: movi v1.4s, #42
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; CHECK-NEXT: bsl v2.16b, v1.16b, v0.16b
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; CHECK-NEXT: mov v0.16b, v2.16b
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; CHECK-NEXT: ret
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%notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>
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%n0 = xor <4 x i32> %x, <i32 42, i32 42, i32 42, i32 42> ; %x
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%n1 = and <4 x i32> %n0, %notmask
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%r = xor <4 x i32> %n1, <i32 42, i32 42, i32 42, i32 42>
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ret <4 x i32> %r
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}
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define <4 x i32> @out_constant_mone_vary(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) {
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; CHECK-LABEL: out_constant_mone_vary:
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; CHECK: // %bb.0:
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; CHECK-NEXT: bic v0.16b, v1.16b, v2.16b
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; CHECK-NEXT: orr v0.16b, v2.16b, v0.16b
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; CHECK-NEXT: ret
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%notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>
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%mx = and <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>
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%my = and <4 x i32> %notmask, %y
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%r = or <4 x i32> %mx, %my
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ret <4 x i32> %r
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}
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define <4 x i32> @in_constant_mone_vary(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) {
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; CHECK-LABEL: in_constant_mone_vary:
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; CHECK: // %bb.0:
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; CHECK-NEXT: bic v0.16b, v1.16b, v2.16b
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; CHECK-NEXT: orr v0.16b, v2.16b, v0.16b
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; CHECK-NEXT: ret
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%n0 = xor <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, %y ; %x
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%n1 = and <4 x i32> %n0, %mask
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%r = xor <4 x i32> %n1, %y
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ret <4 x i32> %r
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}
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; This is not a canonical form. Testing for completeness only.
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define <4 x i32> @out_constant_mone_vary_invmask(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) {
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; CHECK-LABEL: out_constant_mone_vary_invmask:
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; CHECK: // %bb.0:
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; CHECK-NEXT: and v0.16b, v2.16b, v1.16b
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; CHECK-NEXT: orn v0.16b, v0.16b, v2.16b
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; CHECK-NEXT: ret
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%notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>
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%mx = and <4 x i32> %notmask, <i32 -1, i32 -1, i32 -1, i32 -1>
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%my = and <4 x i32> %mask, %y
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%r = or <4 x i32> %mx, %my
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ret <4 x i32> %r
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}
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; This is not a canonical form. Testing for completeness only.
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define <4 x i32> @in_constant_mone_vary_invmask(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) {
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; CHECK-LABEL: in_constant_mone_vary_invmask:
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; CHECK: // %bb.0:
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; CHECK-NEXT: and v0.16b, v1.16b, v2.16b
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; CHECK-NEXT: orn v0.16b, v0.16b, v2.16b
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; CHECK-NEXT: ret
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%notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>
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%n0 = xor <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, %y ; %x
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%n1 = and <4 x i32> %n0, %notmask
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%r = xor <4 x i32> %n1, %y
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ret <4 x i32> %r
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}
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define <4 x i32> @out_constant_42_vary(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) {
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; CHECK-LABEL: out_constant_42_vary:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov v0.16b, v2.16b
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; CHECK-NEXT: movi v2.4s, #42
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; CHECK-NEXT: bsl v0.16b, v2.16b, v1.16b
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; CHECK-NEXT: ret
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%notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>
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%mx = and <4 x i32> %mask, <i32 42, i32 42, i32 42, i32 42>
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%my = and <4 x i32> %notmask, %y
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%r = or <4 x i32> %mx, %my
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ret <4 x i32> %r
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}
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define <4 x i32> @in_constant_42_vary(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) {
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; CHECK-LABEL: in_constant_42_vary:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov v0.16b, v2.16b
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; CHECK-NEXT: movi v2.4s, #42
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; CHECK-NEXT: bsl v0.16b, v2.16b, v1.16b
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; CHECK-NEXT: ret
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%n0 = xor <4 x i32> <i32 42, i32 42, i32 42, i32 42>, %y ; %x
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%n1 = and <4 x i32> %n0, %mask
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%r = xor <4 x i32> %n1, %y
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ret <4 x i32> %r
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}
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; This is not a canonical form. Testing for completeness only.
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define <4 x i32> @out_constant_42_vary_invmask(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) {
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; CHECK-LABEL: out_constant_42_vary_invmask:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov v0.16b, v2.16b
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; CHECK-NEXT: movi v2.4s, #42
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; CHECK-NEXT: bsl v0.16b, v1.16b, v2.16b
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; CHECK-NEXT: ret
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%notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>
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%mx = and <4 x i32> %notmask, <i32 42, i32 42, i32 42, i32 42>
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%my = and <4 x i32> %mask, %y
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%r = or <4 x i32> %mx, %my
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ret <4 x i32> %r
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}
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; This is not a canonical form. Testing for completeness only.
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define <4 x i32> @in_constant_42_vary_invmask(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) {
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; CHECK-LABEL: in_constant_42_vary_invmask:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov v0.16b, v2.16b
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; CHECK-NEXT: movi v2.4s, #42
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; CHECK-NEXT: bsl v0.16b, v1.16b, v2.16b
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; CHECK-NEXT: ret
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%notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>
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%n0 = xor <4 x i32> <i32 42, i32 42, i32 42, i32 42>, %y ; %x
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%n1 = and <4 x i32> %n0, %notmask
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%r = xor <4 x i32> %n1, %y
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ret <4 x i32> %r
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}
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