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https://github.com/RPCS3/llvm-mirror.git
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a41bbe57fe
Emit pseudo instructions indicating unwind codes corresponding to each instruction inside the prologue/epilogue. These are used by the MCLayer to populate the .xdata section. Differential Revision: https://reviews.llvm.org/D50288 llvm-svn: 345701
282 lines
8.7 KiB
LLVM
282 lines
8.7 KiB
LLVM
; RUN: llc < %s -mtriple=aarch64-pc-win32 | FileCheck %s
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define void @pass_va(i32 %count, ...) nounwind {
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entry:
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; CHECK: str x30, [sp, #-80]!
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; CHECK: add x8, sp, #24
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; CHECK: add x0, sp, #24
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; CHECK: stp x6, x7, [sp, #64]
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; CHECK: stp x4, x5, [sp, #48]
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; CHECK: stp x2, x3, [sp, #32]
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; CHECK: str x1, [sp, #24]
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; CHECK: str x8, [sp, #8]
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; CHECK: bl other_func
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; CHECK: ldr x30, [sp], #80
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; CHECK: ret
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%ap = alloca i8*, align 8
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%ap1 = bitcast i8** %ap to i8*
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call void @llvm.va_start(i8* %ap1)
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%ap2 = load i8*, i8** %ap, align 8
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call void @other_func(i8* %ap2)
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ret void
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}
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declare void @other_func(i8*) local_unnamed_addr
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declare void @llvm.va_start(i8*) nounwind
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declare void @llvm.va_copy(i8*, i8*) nounwind
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; CHECK-LABEL: f9:
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; CHECK: sub sp, sp, #16
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; CHECK: add x8, sp, #24
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; CHECK: add x0, sp, #24
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; CHECK: str x8, [sp, #8]
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; CHECK: add sp, sp, #16
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; CHECK: ret
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define i8* @f9(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, i64 %a7, i64 %a8, ...) nounwind {
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entry:
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%ap = alloca i8*, align 8
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%ap1 = bitcast i8** %ap to i8*
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call void @llvm.va_start(i8* %ap1)
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%ap2 = load i8*, i8** %ap, align 8
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ret i8* %ap2
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}
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; CHECK-LABEL: f8:
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; CHECK: sub sp, sp, #16
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; CHECK: add x8, sp, #16
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; CHECK: add x0, sp, #16
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; CHECK: str x8, [sp, #8]
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; CHECK: add sp, sp, #16
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; CHECK: ret
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define i8* @f8(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, i64 %a7, ...) nounwind {
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entry:
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%ap = alloca i8*, align 8
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%ap1 = bitcast i8** %ap to i8*
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call void @llvm.va_start(i8* %ap1)
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%ap2 = load i8*, i8** %ap, align 8
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ret i8* %ap2
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}
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; CHECK-LABEL: f7:
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; CHECK: sub sp, sp, #32
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; CHECK: add x8, sp, #24
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; CHECK: str x7, [sp, #24]
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; CHECK: add x0, sp, #24
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; CHECK: str x8, [sp, #8]
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; CHECK: add sp, sp, #32
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; CHECK: ret
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define i8* @f7(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, ...) nounwind {
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entry:
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%ap = alloca i8*, align 8
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%ap1 = bitcast i8** %ap to i8*
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call void @llvm.va_start(i8* %ap1)
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%ap2 = load i8*, i8** %ap, align 8
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ret i8* %ap2
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}
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; CHECK-LABEL: copy1:
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; CHECK: sub sp, sp, #80
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; CHECK: add x8, sp, #24
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; CHECK: stp x6, x7, [sp, #64]
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; CHECK: stp x4, x5, [sp, #48]
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; CHECK: stp x2, x3, [sp, #32]
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; CHECK: str x1, [sp, #24]
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; CHECK: stp x8, x8, [sp], #80
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; CHECK: ret
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define void @copy1(i64 %a0, ...) nounwind {
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entry:
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%ap = alloca i8*, align 8
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%cp = alloca i8*, align 8
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%ap1 = bitcast i8** %ap to i8*
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%cp1 = bitcast i8** %cp to i8*
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call void @llvm.va_start(i8* %ap1)
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call void @llvm.va_copy(i8* %cp1, i8* %ap1)
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ret void
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}
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declare void @llvm.va_end(i8*)
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declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture) #1
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declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) #1
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declare i32 @__stdio_common_vsprintf(i64, i8*, i64, i8*, i8*, i8*) local_unnamed_addr #3
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declare i64* @__local_stdio_printf_options() local_unnamed_addr #4
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; CHECK-LABEL: fp
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; CHECK: str x21, [sp, #-96]!
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; CHECK: stp x19, x20, [sp, #16]
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; CHECK: stp x29, x30, [sp, #32]
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; CHECK: add x29, sp, #32
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; CHECK: add x8, x29, #24
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; CHECK: mov x19, x2
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; CHECK: mov x20, x1
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; CHECK: mov x21, x0
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; CHECK: stp x6, x7, [x29, #48]
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; CHECK: stp x4, x5, [x29, #32]
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; CHECK: str x3, [x29, #24]
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; CHECK: str x8, [sp, #8]
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; CHECK: bl __local_stdio_printf_options
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; CHECK: ldr x8, [x0]
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; CHECK: add x5, x29, #24
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; CHECK: mov x1, x21
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; CHECK: mov x2, x20
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; CHECK: orr x0, x8, #0x2
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; CHECK: mov x3, x19
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; CHECK: mov x4, xzr
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; CHECK: bl __stdio_common_vsprintf
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; CHECK: cmp w0, #0
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; CHECK: csinv w0, w0, wzr, ge
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; CHECK: ldp x29, x30, [sp, #32]
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; CHECK: ldp x19, x20, [sp, #16]
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; CHECK: ldr x21, [sp], #96
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; CHECK: ret
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define i32 @fp(i8*, i64, i8*, ...) local_unnamed_addr #6 {
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%4 = alloca i8*, align 8
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%5 = bitcast i8** %4 to i8*
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call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %5) #2
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call void @llvm.va_start(i8* nonnull %5)
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%6 = load i8*, i8** %4, align 8
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%7 = call i64* @__local_stdio_printf_options() #2
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%8 = load i64, i64* %7, align 8
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%9 = or i64 %8, 2
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%10 = call i32 @__stdio_common_vsprintf(i64 %9, i8* %0, i64 %1, i8* %2, i8* null, i8* %6) #2
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%11 = icmp sgt i32 %10, -1
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%12 = select i1 %11, i32 %10, i32 -1
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call void @llvm.va_end(i8* nonnull %5)
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call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull %5) #2
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ret i32 %12
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}
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attributes #6 = { "no-frame-pointer-elim"="true" }
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; CHECK-LABEL: vla
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; CHECK: str x23, [sp, #-112]!
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; CHECK: stp x21, x22, [sp, #16]
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; CHECK: stp x19, x20, [sp, #32]
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; CHECK: stp x29, x30, [sp, #48]
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; CHECK: add x29, sp, #48
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; CHECK: add x8, x29, #16
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; CHECK: stur x8, [x29, #-40]
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; CHECK: mov w8, w0
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; CHECK: add x8, x8, #15
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; CHECK: lsr x15, x8, #4
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; CHECK: mov x19, x1
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; CHECK: mov [[REG2:x[0-9]+]], sp
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; CHECK: stp x6, x7, [x29, #48]
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; CHECK: stp x4, x5, [x29, #32]
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; CHECK: stp x2, x3, [x29, #16]
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; CHECK: bl __chkstk
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; CHECK: mov x8, sp
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; CHECK: sub [[REG:x[0-9]+]], x8, x15, lsl #4
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; CHECK: mov sp, [[REG]]
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; CHECK: ldur [[REG3:x[0-9]+]], [x29, #-40]
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; CHECK: sxtw [[REG4:x[0-9]+]], w0
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; CHECK: bl __local_stdio_printf_options
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; CHECK: ldr x8, [x0]
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; CHECK: mov x1, [[REG]]
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; CHECK: mov x2, [[REG4]]
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; CHECK: mov x3, x19
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; CHECK: orr x0, x8, #0x2
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; CHECK: mov x4, xzr
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; CHECK: mov x5, [[REG3]]
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; CHECK: bl __stdio_common_vsprintf
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; CHECK: mov sp, [[REG2]]
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; CHECK: sub sp, x29, #48
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; CHECK: ldp x29, x30, [sp, #48]
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; CHECK: ldp x19, x20, [sp, #32]
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; CHECK: ldp x21, x22, [sp, #16]
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; CHECK: ldr x23, [sp], #112
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; CHECK: ret
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define void @vla(i32, i8*, ...) local_unnamed_addr {
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%3 = alloca i8*, align 8
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%4 = bitcast i8** %3 to i8*
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call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %4) #5
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call void @llvm.va_start(i8* nonnull %4)
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%5 = zext i32 %0 to i64
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%6 = call i8* @llvm.stacksave()
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%7 = alloca i8, i64 %5, align 1
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%8 = load i8*, i8** %3, align 8
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%9 = sext i32 %0 to i64
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%10 = call i64* @__local_stdio_printf_options()
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%11 = load i64, i64* %10, align 8
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%12 = or i64 %11, 2
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%13 = call i32 @__stdio_common_vsprintf(i64 %12, i8* nonnull %7, i64 %9, i8* %1, i8* null, i8* %8)
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call void @llvm.va_end(i8* nonnull %4)
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call void @llvm.stackrestore(i8* %6)
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call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull %4) #5
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ret void
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}
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declare i8* @llvm.stacksave()
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declare void @llvm.stackrestore(i8*)
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; CHECK-LABEL: snprintf
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; CHECK-DAG: sub sp, sp, #96
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; CHECK-DAG: str x21, [sp, #16]
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; CHECK-DAG: stp x19, x20, [sp, #24]
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; CHECK-DAG: str x30, [sp, #40]
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; CHECK-DAG: add x8, sp, #56
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; CHECK-DAG: mov x19, x2
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; CHECK-DAG: mov x20, x1
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; CHECK-DAG: mov x21, x0
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; CHECK-DAG: stp x6, x7, [sp, #80]
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; CHECK-DAG: stp x4, x5, [sp, #64]
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; CHECK-DAG: str x3, [sp, #56]
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; CHECK-DAG: str x8, [sp, #8]
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; CHECK-DAG: bl __local_stdio_printf_options
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; CHECK-DAG: ldr x8, [x0]
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; CHECK-DAG: add x5, sp, #56
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; CHECK-DAG: mov x1, x21
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; CHECK-DAG: mov x2, x20
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; CHECK-DAG: orr x0, x8, #0x2
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; CHECK-DAG: mov x3, x19
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; CHECK-DAG: mov x4, xzr
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; CHECK-DAG: bl __stdio_common_vsprintf
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; CHECK-DAG: ldr x30, [sp, #40]
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; CHECK-DAG: ldp x19, x20, [sp, #24]
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; CHECK-DAG: ldr x21, [sp, #16]
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; CHECK-DAG: cmp w0, #0
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; CHECK-DAG: csinv w0, w0, wzr, ge
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; CHECK-DAG: add sp, sp, #96
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; CHECK-DAG: ret
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define i32 @snprintf(i8*, i64, i8*, ...) local_unnamed_addr #5 {
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%4 = alloca i8*, align 8
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%5 = bitcast i8** %4 to i8*
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call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %5) #2
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call void @llvm.va_start(i8* nonnull %5)
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%6 = load i8*, i8** %4, align 8
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%7 = call i64* @__local_stdio_printf_options() #2
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%8 = load i64, i64* %7, align 8
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%9 = or i64 %8, 2
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%10 = call i32 @__stdio_common_vsprintf(i64 %9, i8* %0, i64 %1, i8* %2, i8* null, i8* %6) #2
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%11 = icmp sgt i32 %10, -1
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%12 = select i1 %11, i32 %10, i32 -1
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call void @llvm.va_end(i8* nonnull %5)
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call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull %5) #2
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ret i32 %12
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}
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; CHECK-LABEL: fixed_params
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; CHECK: sub sp, sp, #32
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; CHECK-DAG: mov w6, w3
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; CHECK-DAG: mov [[REG1:w[0-9]+]], w2
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; CHECK: mov w2, w1
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; CHECK: str w4, [sp]
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; CHECK: fmov x1, d0
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; CHECK: fmov x3, d1
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; CHECK: fmov x5, d2
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; CHECK: fmov x7, d3
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; CHECK: mov w4, [[REG1]]
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; CHECK: str x30, [sp, #16]
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; CHECK: str d4, [sp, #8]
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; CHECK: bl varargs
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; CHECK: ldr x30, [sp, #16]
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; CHECK: add sp, sp, #32
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; CHECK: ret
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define void @fixed_params(i32, double, i32, double, i32, double, i32, double, i32, double) nounwind {
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tail call void (i32, ...) @varargs(i32 %0, double %1, i32 %2, double %3, i32 %4, double %5, i32 %6, double %7, i32 %8, double %9)
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ret void
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}
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declare void @varargs(i32, ...) local_unnamed_addr
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