Dan Gohman 9e9858781c The list-td and list-tdrr schedulers don't yet support physreg ... scheduling dependencies. Add assertion checks to help catch this. It appears the Mips target defaults to list-td, and it has a regression test that uses a physreg dependence. Such code was liable to be miscompiled, and now evokes an assertion failure. llvm-svn: 62177		2009-01-13 20:24:13 +00:00
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Analysis	Wind SCEV back in time, to Nov 18th. This 'fixes' PR3275, PR3294, PR3295,	2009-01-13 09:18:58 +00:00
Archive	Removed trailing whitespace from Makefiles.	2009-01-09 16:44:42 +00:00
AsmParser	Removed trailing whitespace from Makefiles.	2009-01-09 16:44:42 +00:00
Bitcode	Removed trailing whitespace from Makefiles.	2009-01-09 16:44:42 +00:00
CodeGen	The list-td and list-tdrr schedulers don't yet support physreg	2009-01-13 20:24:13 +00:00
Debugger	Removed trailing whitespace from Makefiles.	2009-01-09 16:44:42 +00:00
ExecutionEngine	Rename getABITypeSize to getTypePaddedSize, as	2009-01-12 20:38:59 +00:00
Linker	Removed trailing whitespace from Makefiles.	2009-01-09 16:44:42 +00:00
Support	Removed trailing whitespace from Makefiles.	2009-01-09 16:44:42 +00:00
System	Removed trailing whitespace from Makefiles.	2009-01-09 16:44:42 +00:00
Target	Checking in conditionals, function call, arrays and libcalls implementation.	2009-01-13 19:18:47 +00:00
Transforms	Make instcombine ensure that all allocas are explicitly aligned at at	2009-01-13 20:18:38 +00:00
VMCore	add a new insertAfter method, patch by Tom Jablin!	2009-01-13 07:43:51 +00:00
Makefile	Removed trailing whitespace from Makefiles.	2009-01-09 16:44:42 +00:00