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This also simplifies the IR we create slightly: instead of working out where success & failure should go manually, it turns out we can just always jump to a success/failure block created for the purpose. Later phases will sort out the mess without much difficulty. llvm-svn: 210917
44 lines
1.3 KiB
LLVM
44 lines
1.3 KiB
LLVM
; RUN: llc < %s -mtriple=armv7-apple-ios -verify-machineinstrs | FileCheck %s
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define void @test_cmpxchg_weak(i32 *%addr, i32 %desired, i32 %new) {
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; CHECK-LABEL: test_cmpxchg_weak:
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%pair = cmpxchg weak i32* %addr, i32 %desired, i32 %new seq_cst monotonic
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%oldval = extractvalue { i32, i1 } %pair, 0
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; CHECK: dmb ish
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; CHECK: ldrex [[LOADED:r[0-9]+]], [r0]
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; CHECK: cmp [[LOADED]], r1
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; CHECK: strexeq [[SUCCESS:r[0-9]+]], r2, [r0]
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; CHECK: cmpeq [[SUCCESS]], #0
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; CHECK: bne [[DONE:LBB[0-9]+_[0-9]+]]
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; CHECK: dmb ish
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; CHECK: [[DONE]]:
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; CHECK: str r3, [r0]
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; CHECK: bx lr
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store i32 %oldval, i32* %addr
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ret void
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}
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define i1 @test_cmpxchg_weak_to_bool(i32, i32 *%addr, i32 %desired, i32 %new) {
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; CHECK-LABEL: test_cmpxchg_weak_to_bool:
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%pair = cmpxchg weak i32* %addr, i32 %desired, i32 %new seq_cst monotonic
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%success = extractvalue { i32, i1 } %pair, 1
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; CHECK: dmb ish
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; CHECK: mov r0, #0
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; CHECK: ldrex [[LOADED:r[0-9]+]], [r1]
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; CHECK: cmp [[LOADED]], r2
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; CHECK: strexeq [[STATUS:r[0-9]+]], r3, [r1]
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; CHECK: cmpeq [[STATUS]], #0
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; CHECK: bne [[DONE:LBB[0-9]+_[0-9]+]]
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; CHECK: dmb ish
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; CHECK: mov r0, #1
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; CHECK: [[DONE]]:
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; CHECK: bx lr
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ret i1 %success
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}
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