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b9c8074dcd
subtarget CPU descriptions and support new features of MachineScheduler. MachineModel has three categories of data: 1) Basic properties for coarse grained instruction cost model. 2) Scheduler Read/Write resources for simple per-opcode and operand cost model (TBD). 3) Instruction itineraties for detailed per-cycle reservation tables. These will all live side-by-side. Any subtarget can use any combination of them. Instruction itineraries will not change in the near term. In the long run, I expect them to only be relevant for in-order VLIW machines that have complex contraints and require a precise scheduling/bundling model. Once itineraries are only actively used by VLIW-ish targets, they could be replaced by something more appropriate for those targets. This tablegen backend rewrite sets things up for introducing MachineModel type #2: per opcode/operand cost model. llvm-svn: 159891
247 lines
7.9 KiB
C++
247 lines
7.9 KiB
C++
//===----- ScoreboardHazardRecognizer.cpp - Scheduler Support -------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the ScoreboardHazardRecognizer class, which
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// encapsultes hazard-avoidance heuristics for scheduling, based on the
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// scheduling itineraries specified for the target.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE ::llvm::ScoreboardHazardRecognizer::DebugType
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#include "llvm/CodeGen/ScoreboardHazardRecognizer.h"
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#include "llvm/CodeGen/ScheduleDAG.h"
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#include "llvm/MC/MCInstrItineraries.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Target/TargetInstrInfo.h"
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using namespace llvm;
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#ifndef NDEBUG
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const char *ScoreboardHazardRecognizer::DebugType = "";
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#endif
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ScoreboardHazardRecognizer::
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ScoreboardHazardRecognizer(const InstrItineraryData *II,
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const ScheduleDAG *SchedDAG,
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const char *ParentDebugType) :
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ScheduleHazardRecognizer(), ItinData(II), DAG(SchedDAG), IssueWidth(0),
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IssueCount(0) {
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#ifndef NDEBUG
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DebugType = ParentDebugType;
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#endif
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// Determine the maximum depth of any itinerary. This determines the depth of
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// the scoreboard. We always make the scoreboard at least 1 cycle deep to
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// avoid dealing with the boundary condition.
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unsigned ScoreboardDepth = 1;
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if (ItinData && !ItinData->isEmpty()) {
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for (unsigned idx = 0; ; ++idx) {
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if (ItinData->isEndMarker(idx))
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break;
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const InstrStage *IS = ItinData->beginStage(idx);
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const InstrStage *E = ItinData->endStage(idx);
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unsigned CurCycle = 0;
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unsigned ItinDepth = 0;
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for (; IS != E; ++IS) {
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unsigned StageDepth = CurCycle + IS->getCycles();
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if (ItinDepth < StageDepth) ItinDepth = StageDepth;
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CurCycle += IS->getNextCycles();
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}
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// Find the next power-of-2 >= ItinDepth
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while (ItinDepth > ScoreboardDepth) {
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ScoreboardDepth *= 2;
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// Don't set MaxLookAhead until we find at least one nonzero stage.
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// This way, an itinerary with no stages has MaxLookAhead==0, which
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// completely bypasses the scoreboard hazard logic.
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MaxLookAhead = ScoreboardDepth;
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}
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}
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}
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ReservedScoreboard.reset(ScoreboardDepth);
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RequiredScoreboard.reset(ScoreboardDepth);
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// If MaxLookAhead is not set above, then we are not enabled.
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if (!isEnabled())
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DEBUG(dbgs() << "Disabled scoreboard hazard recognizer\n");
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else {
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// A nonempty itinerary must have a SchedModel.
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IssueWidth = ItinData->SchedModel->IssueWidth;
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DEBUG(dbgs() << "Using scoreboard hazard recognizer: Depth = "
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<< ScoreboardDepth << '\n');
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}
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}
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void ScoreboardHazardRecognizer::Reset() {
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IssueCount = 0;
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RequiredScoreboard.reset();
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ReservedScoreboard.reset();
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}
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void ScoreboardHazardRecognizer::Scoreboard::dump() const {
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dbgs() << "Scoreboard:\n";
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unsigned last = Depth - 1;
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while ((last > 0) && ((*this)[last] == 0))
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last--;
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for (unsigned i = 0; i <= last; i++) {
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unsigned FUs = (*this)[i];
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dbgs() << "\t";
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for (int j = 31; j >= 0; j--)
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dbgs() << ((FUs & (1 << j)) ? '1' : '0');
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dbgs() << '\n';
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}
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}
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bool ScoreboardHazardRecognizer::atIssueLimit() const {
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if (IssueWidth == 0)
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return false;
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return IssueCount == IssueWidth;
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}
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ScheduleHazardRecognizer::HazardType
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ScoreboardHazardRecognizer::getHazardType(SUnit *SU, int Stalls) {
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if (!ItinData || ItinData->isEmpty())
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return NoHazard;
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// Note that stalls will be negative for bottom-up scheduling.
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int cycle = Stalls;
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// Use the itinerary for the underlying instruction to check for
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// free FU's in the scoreboard at the appropriate future cycles.
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const MCInstrDesc *MCID = DAG->getInstrDesc(SU);
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if (MCID == NULL) {
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// Don't check hazards for non-machineinstr Nodes.
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return NoHazard;
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}
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unsigned idx = MCID->getSchedClass();
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for (const InstrStage *IS = ItinData->beginStage(idx),
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*E = ItinData->endStage(idx); IS != E; ++IS) {
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// We must find one of the stage's units free for every cycle the
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// stage is occupied. FIXME it would be more accurate to find the
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// same unit free in all the cycles.
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for (unsigned int i = 0; i < IS->getCycles(); ++i) {
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int StageCycle = cycle + (int)i;
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if (StageCycle < 0)
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continue;
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if (StageCycle >= (int)RequiredScoreboard.getDepth()) {
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assert((StageCycle - Stalls) < (int)RequiredScoreboard.getDepth() &&
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"Scoreboard depth exceeded!");
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// This stage was stalled beyond pipeline depth, so cannot conflict.
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break;
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}
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unsigned freeUnits = IS->getUnits();
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switch (IS->getReservationKind()) {
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case InstrStage::Required:
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// Required FUs conflict with both reserved and required ones
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freeUnits &= ~ReservedScoreboard[StageCycle];
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// FALLTHROUGH
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case InstrStage::Reserved:
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// Reserved FUs can conflict only with required ones.
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freeUnits &= ~RequiredScoreboard[StageCycle];
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break;
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}
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if (!freeUnits) {
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DEBUG(dbgs() << "*** Hazard in cycle +" << StageCycle << ", ");
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DEBUG(dbgs() << "SU(" << SU->NodeNum << "): ");
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DEBUG(DAG->dumpNode(SU));
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return Hazard;
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}
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}
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// Advance the cycle to the next stage.
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cycle += IS->getNextCycles();
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}
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return NoHazard;
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}
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void ScoreboardHazardRecognizer::EmitInstruction(SUnit *SU) {
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if (!ItinData || ItinData->isEmpty())
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return;
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// Use the itinerary for the underlying instruction to reserve FU's
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// in the scoreboard at the appropriate future cycles.
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const MCInstrDesc *MCID = DAG->getInstrDesc(SU);
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assert(MCID && "The scheduler must filter non-machineinstrs");
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if (DAG->TII->isZeroCost(MCID->Opcode))
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return;
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++IssueCount;
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unsigned cycle = 0;
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unsigned idx = MCID->getSchedClass();
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for (const InstrStage *IS = ItinData->beginStage(idx),
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*E = ItinData->endStage(idx); IS != E; ++IS) {
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// We must reserve one of the stage's units for every cycle the
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// stage is occupied. FIXME it would be more accurate to reserve
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// the same unit free in all the cycles.
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for (unsigned int i = 0; i < IS->getCycles(); ++i) {
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assert(((cycle + i) < RequiredScoreboard.getDepth()) &&
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"Scoreboard depth exceeded!");
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unsigned freeUnits = IS->getUnits();
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switch (IS->getReservationKind()) {
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case InstrStage::Required:
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// Required FUs conflict with both reserved and required ones
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freeUnits &= ~ReservedScoreboard[cycle + i];
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// FALLTHROUGH
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case InstrStage::Reserved:
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// Reserved FUs can conflict only with required ones.
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freeUnits &= ~RequiredScoreboard[cycle + i];
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break;
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}
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// reduce to a single unit
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unsigned freeUnit = 0;
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do {
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freeUnit = freeUnits;
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freeUnits = freeUnit & (freeUnit - 1);
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} while (freeUnits);
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if (IS->getReservationKind() == InstrStage::Required)
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RequiredScoreboard[cycle + i] |= freeUnit;
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else
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ReservedScoreboard[cycle + i] |= freeUnit;
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}
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// Advance the cycle to the next stage.
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cycle += IS->getNextCycles();
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}
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DEBUG(ReservedScoreboard.dump());
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DEBUG(RequiredScoreboard.dump());
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}
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void ScoreboardHazardRecognizer::AdvanceCycle() {
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IssueCount = 0;
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ReservedScoreboard[0] = 0; ReservedScoreboard.advance();
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RequiredScoreboard[0] = 0; RequiredScoreboard.advance();
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}
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void ScoreboardHazardRecognizer::RecedeCycle() {
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IssueCount = 0;
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ReservedScoreboard[ReservedScoreboard.getDepth()-1] = 0;
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ReservedScoreboard.recede();
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RequiredScoreboard[RequiredScoreboard.getDepth()-1] = 0;
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RequiredScoreboard.recede();
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}
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