llvm-mirror/test/CodeGen
2011-11-17 23:43:15 +00:00
..
ARM When fast iseling a GEP, accumulate the offset rather than emitting a series of 2011-11-17 07:15:58 +00:00
CBackend
CellSPU Remove histogram tests. 2011-11-12 22:39:40 +00:00
CPP
Generic
MBlaze
Mips
MSP430
PowerPC
PTX
SPARC
Thumb
Thumb2 Add vmov.f32 to materialize f32 immediate splats which cannot be handled by 2011-11-15 02:12:34 +00:00
X86 DISubrange supports unsigned lower/upper array bounds, so let's not fake it in the end while emitting DWARF. If a FE needs to encode signed lower/upper array bounds then we need to extend DISubrange or ad DISignedSubrange. 2011-11-17 23:43:15 +00:00
XCore