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e16dab59f1
This patch unifies the data structures we use for mapping instructions from the original loop to their corresponding instructions in the new loop. Previously, we maintained two distinct maps for this purpose: WidenMap and ScalarIVMap. WidenMap maintained the vector values each instruction from the old loop was represented with, and ScalarIVMap maintained the scalar values each scalarized induction variable was represented with. With this patch, all values created for the new loop are maintained in VectorLoopValueMap. The change allows for several simplifications. Previously, when an instruction was scalarized, we had to insert the scalar values into vectors in order to maintain the mapping in WidenMap. Then, if a user of the scalarized value was also scalar, we had to extract the scalar values from the temporary vector we created. We now aovid these unnecessary scalar-to-vector-to-scalar conversions. If a scalarized value is used by a scalar instruction, the scalar value is used directly. However, if the scalarized value is needed by a vector instruction, we generate the needed insertelement instructions on-demand. A common idiom in several locations in the code (including the scalarization code), is to first get the vector values an instruction from the original loop maps to, and then extract a particular scalar value. This patch adds getScalarValue for this purpose along side getVectorValue as an interface into VectorLoopValueMap. These functions work together to return the requested values if they're available or to produce them if they're not. The mapping has also be made less permissive. Entries can be added to VectorLoopValue map with the new initVector and initScalar functions. getVectorValue has been modified to return a constant reference to the mapped entries. There's no real functional change with this patch; however, in some cases we will generate slightly different code. For example, instead of an insertelement sequence following the definition of an instruction, it will now precede the first use of that instruction. This can be seen in the test case changes. Differential Revision: https://reviews.llvm.org/D23169 llvm-svn: 279649
131 lines
4.9 KiB
LLVM
131 lines
4.9 KiB
LLVM
; RUN: opt -S -vectorize-num-stores-pred=1 -force-vector-width=1 -force-vector-interleave=2 -loop-vectorize -verify-loop-info -simplifycfg < %s | FileCheck %s --check-prefix=UNROLL
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; RUN: opt -S -vectorize-num-stores-pred=1 -force-vector-width=1 -force-vector-interleave=2 -loop-vectorize -verify-loop-info < %s | FileCheck %s --check-prefix=UNROLL-NOSIMPLIFY
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; RUN: opt -S -vectorize-num-stores-pred=1 -force-vector-width=2 -force-vector-interleave=1 -loop-vectorize -enable-cond-stores-vec -verify-loop-info -simplifycfg < %s | FileCheck %s --check-prefix=VEC
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target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-apple-macosx10.9.0"
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; Test predication of stores.
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define i32 @test(i32* nocapture %f) #0 {
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entry:
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br label %for.body
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; VEC-LABEL: test
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; VEC: %[[v0:.+]] = add i64 %index, 0
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; VEC: %[[v1:.+]] = add i64 %index, 1
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; VEC: %[[v2:.+]] = getelementptr inbounds i32, i32* %f, i64 %[[v0]]
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; VEC: %[[v4:.+]] = getelementptr inbounds i32, i32* %f, i64 %[[v1]]
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; VEC: %[[v8:.+]] = icmp sgt <2 x i32> %{{.*}}, <i32 100, i32 100>
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; VEC: %[[v9:.+]] = add nsw <2 x i32> %{{.*}}, <i32 20, i32 20>
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; VEC: %[[v10:.+]] = and <2 x i1> %[[v8]], <i1 true, i1 true>
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; VEC: %[[v11:.+]] = extractelement <2 x i1> %[[v10]], i32 0
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; VEC: %[[v12:.+]] = icmp eq i1 %[[v11]], true
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; VEC: br i1 %[[v12]], label %[[cond:.+]], label %[[else:.+]]
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;
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; VEC: [[cond]]:
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; VEC: %[[v13:.+]] = extractelement <2 x i32> %[[v9]], i32 0
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; VEC: store i32 %[[v13]], i32* %[[v2]], align 4
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; VEC: br label %[[else:.+]]
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;
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; VEC: [[else]]:
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; VEC: %[[v15:.+]] = extractelement <2 x i1> %[[v10]], i32 1
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; VEC: %[[v16:.+]] = icmp eq i1 %[[v15]], true
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; VEC: br i1 %[[v16]], label %[[cond2:.+]], label %[[else2:.+]]
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;
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; VEC: [[cond2]]:
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; VEC: %[[v17:.+]] = extractelement <2 x i32> %[[v9]], i32 1
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; VEC: store i32 %[[v17]], i32* %[[v4]], align 4
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; VEC: br label %[[else2:.+]]
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;
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; VEC: [[else2]]:
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; UNROLL-LABEL: test
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; UNROLL: vector.body:
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; UNROLL: %[[IND:[a-zA-Z0-9]+]] = add i64 %{{.*}}, 0
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; UNROLL: %[[IND1:[a-zA-Z0-9]+]] = add i64 %{{.*}}, 1
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; UNROLL: %[[v0:[a-zA-Z0-9]+]] = getelementptr inbounds i32, i32* %f, i64 %[[IND]]
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; UNROLL: %[[v1:[a-zA-Z0-9]+]] = getelementptr inbounds i32, i32* %f, i64 %[[IND1]]
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; UNROLL: %[[v2:[a-zA-Z0-9]+]] = load i32, i32* %[[v0]], align 4
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; UNROLL: %[[v3:[a-zA-Z0-9]+]] = load i32, i32* %[[v1]], align 4
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; UNROLL: %[[v4:[a-zA-Z0-9]+]] = icmp sgt i32 %[[v2]], 100
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; UNROLL: %[[v5:[a-zA-Z0-9]+]] = icmp sgt i32 %[[v3]], 100
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; UNROLL: %[[v6:[a-zA-Z0-9]+]] = add nsw i32 %[[v2]], 20
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; UNROLL: %[[v7:[a-zA-Z0-9]+]] = add nsw i32 %[[v3]], 20
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; UNROLL: %[[v8:[a-zA-Z0-9]+]] = icmp eq i1 %[[v4]], true
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; UNROLL: br i1 %[[v8]], label %[[cond:[a-zA-Z0-9.]+]], label %[[else:[a-zA-Z0-9.]+]]
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;
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; UNROLL: [[cond]]:
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; UNROLL: store i32 %[[v6]], i32* %[[v0]], align 4
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; UNROLL: br label %[[else]]
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;
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; UNROLL: [[else]]:
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; UNROLL: %[[v9:[a-zA-Z0-9]+]] = icmp eq i1 %[[v5]], true
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; UNROLL: br i1 %[[v9]], label %[[cond2:[a-zA-Z0-9.]+]], label %[[else2:[a-zA-Z0-9.]+]]
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;
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; UNROLL: [[cond2]]:
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; UNROLL: store i32 %[[v7]], i32* %[[v1]], align 4
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; UNROLL: br label %[[else2]]
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;
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; UNROLL: [[else2]]:
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for.body:
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.inc ]
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%arrayidx = getelementptr inbounds i32, i32* %f, i64 %indvars.iv
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%0 = load i32, i32* %arrayidx, align 4
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%cmp1 = icmp sgt i32 %0, 100
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br i1 %cmp1, label %if.then, label %for.inc
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if.then:
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%add = add nsw i32 %0, 20
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store i32 %add, i32* %arrayidx, align 4
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br label %for.inc
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for.inc:
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, 128
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br i1 %exitcond, label %for.end, label %for.body
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for.end:
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ret i32 0
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}
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; Track basic blocks when unrolling conditional blocks. This code used to assert
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; because we did not update the phi nodes with the proper predecessor in the
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; vectorized loop body.
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; PR18724
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; UNROLL-NOSIMPLIFY-LABEL: bug18724
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; UNROLL-NOSIMPLIFY: store i32
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; UNROLL-NOSIMPLIFY: store i32
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define void @bug18724() {
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entry:
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br label %for.body9
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for.body9:
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br i1 undef, label %for.inc26, label %for.body14
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for.body14:
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%indvars.iv3 = phi i64 [ %indvars.iv.next4, %for.inc23 ], [ undef, %for.body9 ]
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%iNewChunks.120 = phi i32 [ %iNewChunks.2, %for.inc23 ], [ undef, %for.body9 ]
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%arrayidx16 = getelementptr inbounds [768 x i32], [768 x i32]* undef, i64 0, i64 %indvars.iv3
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%tmp = load i32, i32* %arrayidx16, align 4
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br i1 undef, label %if.then18, label %for.inc23
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if.then18:
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store i32 2, i32* %arrayidx16, align 4
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%inc21 = add nsw i32 %iNewChunks.120, 1
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br label %for.inc23
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for.inc23:
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%iNewChunks.2 = phi i32 [ %inc21, %if.then18 ], [ %iNewChunks.120, %for.body14 ]
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%indvars.iv.next4 = add nsw i64 %indvars.iv3, 1
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%tmp1 = trunc i64 %indvars.iv3 to i32
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%cmp13 = icmp slt i32 %tmp1, 0
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br i1 %cmp13, label %for.body14, label %for.inc26
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for.inc26:
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%iNewChunks.1.lcssa = phi i32 [ undef, %for.body9 ], [ %iNewChunks.2, %for.inc23 ]
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unreachable
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}
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