Suyog Sarda e156908daa Addition to r216371 (SLP and Loop Vectorization) and r218607 where ...

cost model for signed division by power of 2 was improved for AArch64.
The revision r218607 missed test case for Loop Vectorization.
Adding it in this revision.

Differential Revision: http://reviews.llvm.org/D6181

llvm-svn: 221674

2014-11-11 07:39:27 +00:00

..

aarch64-unroll.ll

This commit allows vectorized loops to be unrolled by a factor of 2 for AArch64.

2014-04-18 07:57:54 +00:00

arm64-unroll.ll

AArch64/ARM64: move ARM64 into AArch64's place

2014-05-24 12:50:23 +00:00

gather-cost.ll

AArch64/ARM64: move ARM64 into AArch64's place

2014-05-24 12:50:23 +00:00

lit.local.cfg

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00

sdiv-pow2.ll

Addition to r216371 (SLP and Loop Vectorization) and r218607 where

2014-11-11 07:39:27 +00:00