Jim Grosbach a568ef0db6 Clean up aliases for ARM VLD1 single-lane assembly parsing a bit. ... Add the 16-bit lane variants while I'm at it. llvm-svn: 145693		2011-12-02 18:52:30 +00:00
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CodeGen	Add instruction selection support for horizontal add/sub of 256-bit floating point vectors. Also add the test case for 256-bit integer vectors.	2011-12-02 07:16:01 +00:00
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MC	Clean up aliases for ARM VLD1 single-lane assembly parsing a bit.	2011-12-02 18:52:30 +00:00
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Transforms	Prevent library calls from being folded if -fno-builtin has been specified.	2011-12-01 22:14:50 +00:00
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