Jakob Stoklund Olesen a28aa26057 Remove TargetInstrInfo::copyRegToReg entirely. ...

Targets must now implement TargetInstrInfo::copyPhysReg instead. There is no
longer a default implementation forwarding to copyRegToReg.

llvm-svn: 108095

2010-07-11 17:01:17 +00:00

..

2009-08-04-LowerExtract-Live.ll

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2009-08-11-RegScavenger-CSR.ll

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2009-08-15-LiveIn-SubReg.ll

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2009-08-15-MissingDead.ll

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2009-08-15-SetCC-Undef.ll

Teach dag combine to fold the following transformation more aggressively:

2010-01-06 19:38:29 +00:00

add-overflow.ll

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add.ll

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addsub-i128.ll

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basic-i1.ll

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basic-i8.ll

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basic-i16.ll

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basic-i32.ll

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basic-i64.ll

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basictest.ll

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burg.ll

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cmp64.ll

Remove TargetInstrInfo::copyRegToReg entirely.

2010-07-11 17:01:17 +00:00

cmp-small-imm.ll

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ct32.ll

Delete useless trailing semicolons.

2010-01-05 17:55:26 +00:00

ct64.ll

Delete useless trailing semicolons.

2010-01-05 17:55:26 +00:00

ctlz16.ll

Delete useless trailing semicolons.

2010-01-05 17:55:26 +00:00

ctlz64.ll

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ctpop16.ll

Delete useless trailing semicolons.

2010-01-05 17:55:26 +00:00

cttz16.ll

Delete useless trailing semicolons.

2010-01-05 17:55:26 +00:00

cycles.ll

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dg.exp

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double-cast.ll

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frameindex.ll

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i1mem.ll

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i1ops.ll

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i8mem.ll

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i17mem.ll

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i56param.ll

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i216mem.ll

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i248mem.ll

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i256mem.ll

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i256param.ll

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inline-asm.ll

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int-setcc.ll

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invalid-apint.ll

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jumptable.ll

Start function numbering at 0.

2010-04-17 16:29:15 +00:00

large-switch.ll

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load-i16.ll

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logic-i16.ll

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many-args.ll

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mulhu.ll

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printf2.ll

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printf.ll

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promote-logic.ll

Change the scheduler from adding nodes in allnodes order

2010-02-24 06:11:37 +00:00

promote-setcc.ll

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sdiv.ll

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simple-select.ll

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switch2.ll

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switch.ll

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sync-intr.ll

Move Blackfin intrinsics into the Target/Blackfin directory.

2009-10-15 18:50:52 +00:00