Alkis Evlogimenos 5e78d4bd75 When an instruction like: A += B had both A and B virtual registers ... spilled, A was loaded from its stack location twice. This fixes the bug. llvm-svn: 11093		2004-02-03 01:13:07 +00:00
..
InstrSched	Moved iterators around.	2004-01-20 17:51:13 +00:00
ModuloScheduling
SelectionDAG
LiveIntervals.cpp	Should be more careful. The previously applied change made all counts	2004-02-02 20:29:57 +00:00
LiveVariables.cpp	Finegrainify namespacification, use new MRegisterInfo::isVirtualRegister	2004-01-31 21:27:19 +00:00
MachineCodeEmitter.cpp
MachineCodeForInstruction.cpp
MachineFunction.cpp	Fix a bug in a recent checkin	2004-02-01 05:25:07 +00:00
MachineInstr.cpp	When an instruction like: A += B had both A and B virtual registers	2004-02-03 01:13:07 +00:00
MachineInstrAnnot.cpp
Makefile
Passes.cpp
PHIElimination.cpp
PrologEpilogInserter.cpp
RegAllocLinearScan.cpp	When an instruction like: A += B had both A and B virtual registers	2004-02-03 01:13:07 +00:00
RegAllocLocal.cpp	Finegrainify namespacification, use new MRegisterInfo::isVirtualRegister	2004-01-31 21:27:19 +00:00
RegAllocSimple.cpp
TwoAddressInstructionPass.cpp	Revert changes. Will implement this using a different set of primitives	2004-02-02 23:08:58 +00:00