Paul Robinson ab6984b108 [MC] Allow .file directives to be out-of-order ...

llvm-svn: 320727

2017-12-14 18:46:43 +00:00

..

AArch64

Re-commit: [TableGen] AsmMatcher: Fix bug with reported diagnostic for operand.

2017-12-14 16:09:48 +00:00

AMDGPU

[AMDGPU][MC][GFX9] Corrected encoding of ttmp registers, disabled tba/tma

2017-12-11 15:23:20 +00:00

ARM

[DWARFv5] Emit v5 line table header.

2017-12-05 20:35:00 +00:00

AsmParser

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

AVR

[AVR] Implement some missing code paths

2017-12-11 11:01:27 +00:00

BPF

bpf: print backward branch target properly

2017-11-16 19:15:36 +00:00

COFF

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

Disassembler

AMDGPU: Partially fix disassembly of MIMG instructions

2017-12-13 21:07:51 +00:00

ELF

Re-submit r289925 (Update .debug_line section version to match DWARF version)

2017-12-04 21:27:46 +00:00

Hexagon

[Hexagon] Add support for Hexagon V65

2017-12-11 18:57:54 +00:00

Lanai

[lanai] Add more tests for assembly of conditional ALU ops

2016-07-11 17:58:16 +00:00

MachO

[MC] Allow .file directives to be out-of-order

2017-12-14 18:46:43 +00:00

Markup

…

Mips

[mips] Removal of microMIPS64R6

2017-12-11 11:21:40 +00:00

PowerPC

PowerPC: support external pid instructions in MC layer.

2017-12-10 08:43:19 +00:00

RISCV

[RISCV] Define sfence.vma InstAliases to match the GNU RISC-V tools

2017-12-13 12:46:55 +00:00

Sparc

[Sparc] invalid adjustments in TLS_LE/TLS_LDO relocations removed

2017-07-25 15:28:28 +00:00

SystemZ

[SystemZ, AsmParser] Enable the mnemonic spell corrector.

2017-07-18 09:17:00 +00:00

WebAssembly

[WebAssembly] Use bitfield types in wasm YAML representation

2017-12-13 22:02:25 +00:00

X86

[X86][AVX][AVX2]: Adding full coverage of MC encoding for the AVX, AVX2 isa set.<NFC>

2017-12-14 16:46:47 +00:00