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incarnations), integrated into the MC framework. The disassembler is table-driven, using a custom TableGen backend to generate hierarchical tables optimized for fast decode. The disassembler consumes MemoryObjects and produces arrays of MCInsts, adhering to the abstract base class MCDisassembler (llvm/MC/MCDisassembler.h). The disassembler is documented in detail in - lib/Target/X86/Disassembler/X86Disassembler.cpp (disassembler runtime) - utils/TableGen/DisassemblerEmitter.cpp (table emitter) You can test the disassembler by running llvm-mc -disassemble for i386 or x86_64 targets. Please let me know if you encounter any problems with it. llvm-svn: 91749
292 lines
12 KiB
C++
292 lines
12 KiB
C++
//===- X86DisassemblerTables.h - Disassembler tables ------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file is part of the X86 Disassembler Emitter.
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// It contains the interface of the disassembler tables.
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// Documentation for the disassembler emitter in general can be found in
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// X86DisasemblerEmitter.h.
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//
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//===----------------------------------------------------------------------===//
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#ifndef X86DISASSEMBLERTABLES_H
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#define X86DISASSEMBLERTABLES_H
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#include "X86DisassemblerShared.h"
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#include "X86ModRMFilters.h"
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#include "llvm/Support/raw_ostream.h"
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#include <vector>
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namespace llvm {
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namespace X86Disassembler {
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/// DisassemblerTables - Encapsulates all the decode tables being generated by
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/// the table emitter. Contains functions to populate the tables as well as
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/// to emit them as hierarchical C structures suitable for consumption by the
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/// runtime.
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class DisassemblerTables {
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private:
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/// The decoder tables. There is one for each opcode type:
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/// [0] one-byte opcodes
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/// [1] two-byte opcodes of the form 0f __
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/// [2] three-byte opcodes of the form 0f 38 __
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/// [3] three-byte opcodes of the form 0f 3a __
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ContextDecision* Tables[4];
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/// The instruction information table
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std::vector<InstructionSpecifier> InstructionSpecifiers;
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/// True if there are primary decode conflicts in the instruction set
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bool HasConflicts;
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/// emitOneID - Emits a table entry for a single instruction entry, at the
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/// innermost level of the structure hierarchy. The entry is printed out
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/// in the format "nnnn, /* MNEMONIC */" where nnnn is the ID in decimal,
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/// the comma is printed if addComma is true, and the menonic is the name
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/// of the instruction as listed in the LLVM tables.
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///
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/// @param o - The output stream to print the entry on.
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/// @param i - The indentation level for o.
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/// @param id - The unique ID of the instruction to print.
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/// @param addComma - Whether or not to print a comma after the ID. True if
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/// additional items will follow.
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void emitOneID(raw_ostream &o,
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uint32_t &i,
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InstrUID id,
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bool addComma) const;
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/// emitModRMDecision - Emits a table of entries corresponding to a single
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/// ModR/M decision. Compacts the ModR/M decision if possible. ModR/M
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/// decisions are printed as:
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///
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/// { /* struct ModRMDecision */
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/// TYPE,
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/// modRMTablennnn
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/// }
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///
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/// where nnnn is a unique ID for the corresponding table of IDs.
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/// TYPE indicates whether the table has one entry that is the same
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/// regardless of ModR/M byte, two entries - one for bytes 0x00-0xbf and one
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/// for bytes 0xc0-0xff -, or 256 entries, one for each possible byte.
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/// nnnn is the number of a table for looking up these values. The tables
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/// are writen separately so that tables consisting entirely of zeros will
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/// not be duplicated. (These all have the name modRMEmptyTable.) A table
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/// is printed as:
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///
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/// InstrUID modRMTablennnn[k] = {
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/// nnnn, /* MNEMONIC */
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/// ...
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/// nnnn /* MNEMONIC */
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/// };
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///
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/// @param o1 - The output stream to print the ID table to.
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/// @param o2 - The output stream to print the decision structure to.
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/// @param i1 - The indentation level to use with stream o1.
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/// @param i2 - The indentation level to use with stream o2.
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/// @param decision - The ModR/M decision to emit. This decision has 256
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/// entries - emitModRMDecision decides how to compact it.
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void emitModRMDecision(raw_ostream &o1,
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raw_ostream &o2,
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uint32_t &i1,
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uint32_t &i2,
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ModRMDecision &decision) const;
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/// emitOpcodeDecision - Emits an OpcodeDecision and all its subsidiary ModR/M
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/// decisions. An OpcodeDecision is printed as:
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///
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/// { /* struct OpcodeDecision */
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/// /* 0x00 */
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/// { /* struct ModRMDecision */
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/// ...
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/// }
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/// ...
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/// }
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///
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/// where the ModRMDecision structure is printed as described in the
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/// documentation for emitModRMDecision(). emitOpcodeDecision() passes on a
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/// stream and indent level for the UID tables generated by
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/// emitModRMDecision(), but does not use them itself.
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///
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/// @param o1 - The output stream to print the ID tables generated by
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/// emitModRMDecision() to.
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/// @param o2 - The output stream for the decision structure itself.
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/// @param i1 - The indent level to use with stream o1.
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/// @param i2 - The indent level to use with stream o2.
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/// @param decision - The OpcodeDecision to emit along with its subsidiary
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/// structures.
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void emitOpcodeDecision(raw_ostream &o1,
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raw_ostream &o2,
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uint32_t &i1,
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uint32_t &i2,
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OpcodeDecision &decision) const;
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/// emitContextDecision - Emits a ContextDecision and all its subsidiary
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/// Opcode and ModRMDecisions. A ContextDecision is printed as:
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///
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/// struct ContextDecision NAME = {
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/// { /* OpcodeDecisions */
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/// /* IC */
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/// { /* struct OpcodeDecision */
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/// ...
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/// },
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/// ...
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/// }
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/// }
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///
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/// NAME is the name of the ContextDecision (typically one of the four names
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/// ONEBYTE_SYM, TWOBYTE_SYM, THREEBYTE38_SYM, and THREEBYTE3A_SYM from
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/// X86DisassemblerDecoderCommon.h).
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/// IC is one of the contexts in InstructionContext. There is an opcode
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/// decision for each possible context.
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/// The OpcodeDecision structures are printed as described in the
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/// documentation for emitOpcodeDecision.
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///
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/// @param o1 - The output stream to print the ID tables generated by
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/// emitModRMDecision() to.
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/// @param o2 - The output stream to print the decision structure to.
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/// @param i1 - The indent level to use with stream o1.
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/// @param i2 - The indent level to use with stream o2.
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/// @param decision - The ContextDecision to emit along with its subsidiary
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/// structures.
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/// @param name - The name for the ContextDecision.
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void emitContextDecision(raw_ostream &o1,
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raw_ostream &o2,
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uint32_t &i1,
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uint32_t &i2,
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ContextDecision &decision,
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const char* name) const;
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/// emitInstructionInfo - Prints the instruction specifier table, which has
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/// one entry for each instruction, and contains name and operand
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/// information. This table is printed as:
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///
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/// struct InstructionSpecifier CONTEXTS_SYM[k] = {
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/// {
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/// /* nnnn */
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/// "MNEMONIC",
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/// 0xnn,
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/// {
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/// {
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/// ENCODING,
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/// TYPE
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/// },
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/// ...
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/// }
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/// },
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/// };
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///
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/// k is the total number of instructions.
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/// nnnn is the ID of the current instruction (0-based). This table
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/// includes entries for non-instructions like PHINODE.
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/// 0xnn is the lowest possible opcode for the current instruction, used for
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/// AddRegFrm instructions to compute the operand's value.
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/// ENCODING and TYPE describe the encoding and type for a single operand.
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///
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/// @param o - The output stream to which the instruction table should be
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/// written.
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/// @param i - The indent level for use with the stream.
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void emitInstructionInfo(raw_ostream &o, uint32_t &i) const;
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/// emitContextTable - Prints the table that is used to translate from an
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/// instruction attribute mask to an instruction context. This table is
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/// printed as:
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///
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/// InstructionContext CONTEXTS_STR[256] = {
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/// IC, /* 0x00 */
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/// ...
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/// };
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///
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/// IC is the context corresponding to the mask 0x00, and there are 256
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/// possible masks.
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///
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/// @param o - The output stream to which the context table should be written.
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/// @param i - The indent level for use with the stream.
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void emitContextTable(raw_ostream &o, uint32_t &i) const;
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/// emitContextDecisions - Prints all four ContextDecision structures using
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/// emitContextDecision().
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///
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/// @param o1 - The output stream to print the ID tables generated by
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/// emitModRMDecision() to.
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/// @param o2 - The output stream to print the decision structures to.
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/// @param i1 - The indent level to use with stream o1.
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/// @param i2 - The indent level to use with stream o2.
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void emitContextDecisions(raw_ostream &o1,
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raw_ostream &o2,
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uint32_t &i1,
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uint32_t &i2) const;
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/// setTableFields - Uses a ModRMFilter to set the appropriate entries in a
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/// ModRMDecision to refer to a particular instruction ID.
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///
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/// @param decision - The ModRMDecision to populate.
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/// @param filter - The filter to use in deciding which entries to populate.
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/// @param uid - The unique ID to set matching entries to.
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/// @param opcode - The opcode of the instruction, for error reporting.
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void setTableFields(ModRMDecision &decision,
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const ModRMFilter &filter,
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InstrUID uid,
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uint8_t opcode);
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public:
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/// Constructor - Allocates space for the class decisions and clears them.
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DisassemblerTables();
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~DisassemblerTables();
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/// emit - Emits the instruction table, context table, and class decisions.
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///
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/// @param o - The output stream to print the tables to.
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void emit(raw_ostream &o) const;
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/// setTableFields - Uses the opcode type, instruction context, opcode, and a
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/// ModRMFilter as criteria to set a particular set of entries in the
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/// decode tables to point to a specific uid.
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///
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/// @param type - The opcode type (ONEBYTE, TWOBYTE, etc.)
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/// @param insnContext - The context to use (IC, IC_64BIT, etc.)
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/// @param opcode - The last byte of the opcode (not counting any escape
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/// or extended opcodes).
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/// @param filter - The ModRMFilter that decides which ModR/M byte values
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/// correspond to the desired instruction.
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/// @param uid - The unique ID of the instruction.
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void setTableFields(OpcodeType type,
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InstructionContext insnContext,
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uint8_t opcode,
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const ModRMFilter &filter,
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InstrUID uid);
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/// specForUID - Returns the instruction specifier for a given unique
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/// instruction ID. Used when resolving collisions.
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///
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/// @param uid - The unique ID of the instruction.
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/// @return - A reference to the instruction specifier.
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InstructionSpecifier& specForUID(InstrUID uid) {
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if (uid >= InstructionSpecifiers.size())
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InstructionSpecifiers.resize(uid + 1);
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return InstructionSpecifiers[uid];
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}
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// hasConflicts - Reports whether there were primary decode conflicts
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// from any instructions added to the tables.
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// @return - true if there were; false otherwise.
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bool hasConflicts() {
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return HasConflicts;
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}
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};
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} // namespace X86Disassembler
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} // namespace llvm
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#endif
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