Zaara Syeda 891074f69a [PowerPC] Set isAsmParserOnly=1 for X-form TLS loads/stores ... The X-form TLS load/store instructions added for optimizing the initial-exec sequence in https://reviews.llvm.org/rL327635 fail to assemble. llvm-mc fails with the error: invalid operand for instruction. This patch adds these instructions into a block with isAsmParserOnly, similar to how ADD8TLS_ is currently handled. Differential Revision: https://reviews.llvm.org/D47382 llvm-svn: 333374		2018-05-28 15:27:58 +00:00
..
dcbt.s
deprecated-p7.s
directive-parse-err.s
htm.s
invalid-instructions-spellcheck.s	[PowerPC, AsmParser] Enable the mnemonic spell corrector	2017-12-16 02:42:18 +00:00
lcomm.s
lit.local.cfg
ppc32-ba.s
ppc32-extpid-e500.s	PowerPC: support external pid instructions in MC layer.	2017-12-10 08:43:19 +00:00
ppc64-abiversion.s
ppc64-encoding-4xx.s
ppc64-encoding-6xx.s
ppc64-encoding-bookII.s
ppc64-encoding-bookIII.s
ppc64-encoding-e500.s
ppc64-encoding-ext.s
ppc64-encoding-fp.s
ppc64-encoding-p8vector.s
ppc64-encoding-spe.s
ppc64-encoding-vmx.s
ppc64-encoding.s
ppc64-errors.s
ppc64-fixup-apply.s
ppc64-fixup-explicit.s
ppc64-fixups.s
ppc64-initial-cfa.s
ppc64-localentry-error1.s
ppc64-localentry-error2.s
ppc64-localentry.s
ppc64-operands.s
ppc64-regs.s
ppc64-relocs-01.s
ppc64-tls-relocs-01.s	[PowerPC] Set isAsmParserOnly=1 for X-form TLS loads/stores	2018-05-28 15:27:58 +00:00
ppc-llong.s
ppc-machine.s
ppc-nop.s
ppc-reloc.s
ppc-separator.s
ppc-word.s
pr24686.s
qpx.s
st-other-crash.s
tls-gd-obj.s
tls-ie-obj.s
tls-ld-obj.s
vsx.s	[PowerPC] Code cleanup. Remove instructions that were withdrawn from Power 9.	2018-02-23 15:55:16 +00:00