Alex Bradbury b3265dc2cf [RISCV][MC] Reject bare symbols for the simm12 operand type ...

addi a0, a0, foo and lw a0, foo(a0) and similar are now rejected. An explicit 
%lo and %pcrel_lo modifier is required. This matches gas behaviour.

llvm-svn: 342487

2018-09-18 15:13:29 +00:00

..

AArch64

[AArch64] Attempt to parse more operands as expressions

2018-09-18 09:44:53 +00:00

AMDGPU

AMDGPU: Print all kernel descriptor directives (including the ones with default values)

2018-09-12 20:25:39 +00:00

ARM

Revert "[DWARF] reposting r342048, which was reverted in r342056 due to buildbot errors. Adjusted 2 test cases for ARM and darwin and fixed a bug with the original change in dsymutil."

2018-09-17 15:40:01 +00:00

AsmParser

[debuginfo] generate debug info with asm+.file

2018-08-28 16:23:39 +00:00

AVR

[AVR] Redefine the 'SBR' instruction as an alias

2018-09-01 12:22:54 +00:00

BPF

…

COFF

[codeview] Add .cv_string directive for testing purposes

2018-09-07 21:30:52 +00:00

Disassembler

[RISCV] Fix decoding of invalid instruction with C extension enabled.

2018-09-13 18:21:19 +00:00

ELF

The initial .text section generated in object files was missing the

2018-09-06 22:09:31 +00:00

Hexagon

Check for tied operands

2018-08-13 14:01:25 +00:00

Lanai

…

MachO

[MC/Dwarf] Unclamp DWARF linetables format on Darwin.

2018-09-13 13:13:50 +00:00

Mips

[mips] Fix MIPS N32 ABI triples support

2018-09-17 21:21:57 +00:00

PowerPC

[MC] Avoid inlining constant symbols with variants.

2018-09-17 20:34:26 +00:00

RISCV

[RISCV][MC] Reject bare symbols for the simm12 operand type

2018-09-18 15:13:29 +00:00

Sparc

[Sparc] allow tls_add/tls_call syntax in assembler parser

2018-09-03 10:38:12 +00:00

SystemZ

…

WebAssembly

[WebAssembly] SIMD shifts

2018-09-15 00:45:31 +00:00

X86

[X86][Assembler] Allow %eip as a register in 32-bit mode for .cfi directives.

2018-09-06 02:03:14 +00:00