Jim Grosbach b6e177bd4e VST2 four-register w/ update pseudos for fixed/register update. ...

rdar://10724489

llvm-svn: 148560

2012-01-20 19:16:00 +00:00

..

ARM

VST2 four-register w/ update pseudos for fixed/register update.

2012-01-20 19:16:00 +00:00

CBackend

Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic.

2011-11-27 06:54:59 +00:00

CellSPU

Transform: (EXTRACT_VECTOR_ELT( VECTOR_SHUFFLE )) -> EXTRACT_VECTOR_ELT.

2012-01-17 21:44:01 +00:00

CPP

manually upgrade a bunch of tests to modern syntax, and remove some that

2011-06-17 03:14:27 +00:00

Generic

Manually upgrade the test suite to specify the flag to cttz and ctlz.

2011-12-12 11:59:10 +00:00

Hexagon

Hexagon: Fix a nasty order-of-initialization bug.

2011-12-16 19:08:59 +00:00

MBlaze

Change the default scheduler from Latency to ILP, since Latency

2011-10-24 17:45:02 +00:00

Mips

Have getRegForInlineAsmConstraint return the correct register class when target

2012-01-04 02:45:01 +00:00

MSP430

Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic.

2011-11-27 06:54:59 +00:00

PowerPC

AggressiveAntiDepBreaker needs to skip debug values because a debug value does not have a corresponding SUnit

2012-01-16 22:53:41 +00:00

PTX

PTX: Continue to fix up the register mess.

2011-12-06 17:39:48 +00:00

SPARC

Sparc CodeGen: Fix AnalyzeBranch for PR 10282. Removing addSuccessor() since

2011-12-03 21:24:48 +00:00

Thumb

Fix more places which should be checking for iOS, not darwin.

2012-01-04 01:55:04 +00:00

Thumb2

After r147827 and r147902, it's now possible for unallocatable registers to be

2012-01-14 01:53:46 +00:00

X86

Add support for selecting 256-bit PALIGNR.

2012-01-20 05:53:00 +00:00

XCore

FileCheck hygiene.

2012-01-05 00:43:34 +00:00