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dd2cc38f1b
Resolving fixup_riscv_call by assembler when the linker relaxation diabled and the function and callsite within the same compile unit. And also adding static_assert after Infos array declaration to avoid missing any new fixup in MCFixupKindInfo in the future. Differential Revision: https://reviews.llvm.org/D47126 llvm-svn: 333487
40 lines
1.1 KiB
ArmAsm
40 lines
1.1 KiB
ArmAsm
# RUN: llvm-mc -filetype=obj -triple riscv32 < %s \
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# RUN: | llvm-objdump -d - | FileCheck -check-prefix=INSTR %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 < %s \
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# RUN: | llvm-readobj -r | FileCheck -check-prefix=RELOC %s
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# RUN: llvm-mc -triple riscv32 < %s -show-encoding \
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# RUN: | FileCheck -check-prefix=FIXUP %s
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.long foo
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call foo
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# RELOC: R_RISCV_CALL foo 0x0
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# INSTR: auipc ra, 0
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# INSTR: jalr ra
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# FIXUP: fixup A - offset: 0, value: foo, kind: fixup_riscv_call
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call bar
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# RELOC: R_RISCV_CALL bar 0x0
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# INSTR: auipc ra, 0
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# INSTR: jalr ra
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# FIXUP: fixup A - offset: 0, value: bar, kind: fixup_riscv_call
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# Ensure that calls to functions whose names coincide with register names work.
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call zero
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# RELOC: R_RISCV_CALL zero 0x0
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# INSTR: auipc ra, 0
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# INSTR: jalr ra
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# FIXUP: fixup A - offset: 0, value: zero, kind: fixup_riscv_call
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call f1
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# RELOC: R_RISCV_CALL f1 0x0
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# INSTR: auipc ra, 0
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# INSTR: jalr ra
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# FIXUP: fixup A - offset: 0, value: f1, kind: fixup_riscv_call
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call ra
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# RELOC: R_RISCV_CALL ra 0x0
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# INSTR: auipc ra, 0
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# INSTR: jalr ra
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# FIXUP: fixup A - offset: 0, value: ra, kind: fixup_riscv_call
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