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Matt Arsenault bcf27a40b4 TableGen: Support physical register inputs > 255 
This was truncating register value that didn't fit in unsigned char.
Switch AMDGPU sendmsg intrinsics to using a tablegen pattern.

llvm-svn: 366695
2019-07-22 15:02:34 +00:00
..
llvm
TableGen: Support physical register inputs > 255
2019-07-22 15:02:34 +00:00
llvm-c
[Remarks] Simplify and refactor the RemarkParser interface
2019-07-16 15:25:05 +00:00