Mark Searles bf29d8d265 [AMDGPU] Increased vector length for global/constant loads.
Summary: GCN ISA supports instructions that can read 16 consecutive dwords from memory through the scalar data cache; loadstoreVectorizer should take advantage of the wider vector length and pack 16/8 elements of dwords/quadwords.

Author: FarhanaAleen

Reviewed By: rampitec

Subscribers: llvm-commits, AMDGPU

Differential Revision: https://reviews.llvm.org/D43275

llvm-svn: 325518
2018-02-19 16:42:49 +00:00
2018-02-19 16:12:20 +00:00
2014-03-02 13:08:46 +00:00
2016-01-26 21:29:08 +00:00
2018-01-29 17:02:34 +00:00
2017-01-12 18:02:42 +00:00
2017-08-18 02:39:28 +00:00

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