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c37cd8d78d
This reverts r317579, originally committed as r317100.
There is a design issue with marking CFI instructions duplicatable. Not
all targets support the CFIInstrInserter pass, and targets like Darwin
can't cope with duplicated prologue setup CFI instructions. The compact
unwind info emission fails.
When the following code is compiled for arm64 on Mac at -O3, the CFI
instructions end up getting tail duplicated, which causes compact unwind
info emission to fail:
int a, c, d, e, f, g, h, i, j, k, l, m;
void n(int o, int *b) {
if (g)
f = 0;
for (; f < o; f++) {
m = a;
if (l > j * k > i)
j = i = k = d;
h = b[c] - e;
}
}
We get assembly that looks like this:
; BB#1: ; %if.then
Lloh3:
adrp x9, _f@GOTPAGE
Lloh4:
ldr x9, [x9, _f@GOTPAGEOFF]
mov w8, wzr
Lloh5:
str wzr, [x9]
stp x20, x19, [sp, #-16]! ; 8-byte Folded Spill
.cfi_def_cfa_offset 16
.cfi_offset w19, -8
.cfi_offset w20, -16
cmp w8, w0
b.lt LBB0_3
b LBB0_7
LBB0_2: ; %entry.if.end_crit_edge
Lloh6:
adrp x8, _f@GOTPAGE
Lloh7:
ldr x8, [x8, _f@GOTPAGEOFF]
Lloh8:
ldr w8, [x8]
stp x20, x19, [sp, #-16]! ; 8-byte Folded Spill
.cfi_def_cfa_offset 16
.cfi_offset w19, -8
.cfi_offset w20, -16
cmp w8, w0
b.ge LBB0_7
LBB0_3: ; %for.body.lr.ph
Note the multiple .cfi_def* directives. Compact unwind info emission
can't handle that.
llvm-svn: 317726
107 lines
4.0 KiB
C++
107 lines
4.0 KiB
C++
//===- TargetFrameLoweringImpl.cpp - Implement target frame interface ------==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// Implements the layout of a stack frame on the target machine.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/ADT/BitVector.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/IR/Attributes.h"
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#include "llvm/IR/CallingConv.h"
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#include "llvm/IR/Function.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/CodeGen/TargetFrameLowering.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include "llvm/Target/TargetSubtargetInfo.h"
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using namespace llvm;
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TargetFrameLowering::~TargetFrameLowering() = default;
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/// The default implementation just looks at attribute "no-frame-pointer-elim".
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bool TargetFrameLowering::noFramePointerElim(const MachineFunction &MF) const {
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auto Attr = MF.getFunction()->getFnAttribute("no-frame-pointer-elim");
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return Attr.getValueAsString() == "true";
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}
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/// Returns the displacement from the frame register to the stack
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/// frame of the specified index, along with the frame register used
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/// (in output arg FrameReg). This is the default implementation which
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/// is overridden for some targets.
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int TargetFrameLowering::getFrameIndexReference(const MachineFunction &MF,
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int FI, unsigned &FrameReg) const {
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const MachineFrameInfo &MFI = MF.getFrameInfo();
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const TargetRegisterInfo *RI = MF.getSubtarget().getRegisterInfo();
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// By default, assume all frame indices are referenced via whatever
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// getFrameRegister() says. The target can override this if it's doing
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// something different.
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FrameReg = RI->getFrameRegister(MF);
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return MFI.getObjectOffset(FI) + MFI.getStackSize() -
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getOffsetOfLocalArea() + MFI.getOffsetAdjustment();
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}
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bool TargetFrameLowering::needsFrameIndexResolution(
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const MachineFunction &MF) const {
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return MF.getFrameInfo().hasStackObjects();
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}
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void TargetFrameLowering::determineCalleeSaves(MachineFunction &MF,
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BitVector &SavedRegs,
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RegScavenger *RS) const {
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const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
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// Resize before the early returns. Some backends expect that
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// SavedRegs.size() == TRI.getNumRegs() after this call even if there are no
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// saved registers.
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SavedRegs.resize(TRI.getNumRegs());
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// When interprocedural register allocation is enabled caller saved registers
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// are preferred over callee saved registers.
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if (MF.getTarget().Options.EnableIPRA && isSafeForNoCSROpt(MF.getFunction()))
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return;
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// Get the callee saved register list...
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const MCPhysReg *CSRegs = MF.getRegInfo().getCalleeSavedRegs();
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// Early exit if there are no callee saved registers.
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if (!CSRegs || CSRegs[0] == 0)
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return;
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// In Naked functions we aren't going to save any registers.
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if (MF.getFunction()->hasFnAttribute(Attribute::Naked))
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return;
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// Functions which call __builtin_unwind_init get all their registers saved.
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bool CallsUnwindInit = MF.callsUnwindInit();
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const MachineRegisterInfo &MRI = MF.getRegInfo();
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for (unsigned i = 0; CSRegs[i]; ++i) {
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unsigned Reg = CSRegs[i];
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if (CallsUnwindInit || MRI.isPhysRegModified(Reg))
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SavedRegs.set(Reg);
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}
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}
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unsigned TargetFrameLowering::getStackAlignmentSkew(
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const MachineFunction &MF) const {
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// When HHVM function is called, the stack is skewed as the return address
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// is removed from the stack before we enter the function.
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if (LLVM_UNLIKELY(MF.getFunction()->getCallingConv() == CallingConv::HHVM))
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return MF.getTarget().getPointerSize();
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return 0;
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}
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