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a3aa1d15da
This change adds new flag -mips-abi-flags to the llvm-readobj. This flag forces printing of .MIPS.abiflags section content. https://dmz-portal.mips.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking#10.2.1._.MIPS.abiflags llvm-svn: 236737
43 lines
1.2 KiB
Plaintext
43 lines
1.2 KiB
Plaintext
RUN: llvm-readobj -mips-abi-flags %p/Inputs/abiflags.obj.elf-mipsel | \
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RUN: FileCheck -check-prefix=EL64 %s
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RUN: llvm-readobj -mips-abi-flags %p/Inputs/abiflags.obj.elf-mips | \
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RUN: FileCheck -check-prefix=BE32 %s
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EL64: MIPS ABI Flags {
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EL64-NEXT: Version: 0
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EL64-NEXT: ISA: MIPS64r5
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EL64-NEXT: ISA Extension: Cavium Networks Octeon3 (0x13)
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EL64-NEXT: ASEs [ (0x103)
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EL64-NEXT: DSP (0x1)
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EL64-NEXT: DSPR2 (0x2)
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EL64-NEXT: VZ (0x100)
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EL64-NEXT: ]
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EL64-NEXT: FP ABI: Hard float (double precision) (0x1)
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EL64-NEXT: GPR size: 64
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EL64-NEXT: CPR1 size: 64
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EL64-NEXT: CPR2 size: 0
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EL64-NEXT: Flags 1 [ (0x1)
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EL64-NEXT: ODDSPREG (0x1)
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EL64-NEXT: ]
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EL64-NEXT: Flags 2: 0x0
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EL64-NEXT: }
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BE32: MIPS ABI Flags {
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BE32-NEXT: Version: 0
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BE32-NEXT: ISA: MIPS32r2
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BE32-NEXT: ISA Extension: None (0x0)
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BE32-NEXT: ASEs [ (0x803)
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BE32-NEXT: DSP (0x1)
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BE32-NEXT: DSPR2 (0x2)
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BE32-NEXT: microMIPS (0x800)
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BE32-NEXT: ]
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BE32-NEXT: FP ABI: Soft float (0x3)
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BE32-NEXT: GPR size: 32
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BE32-NEXT: CPR1 size: 0
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BE32-NEXT: CPR2 size: 0
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BE32-NEXT: Flags 1 [ (0x1)
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BE32-NEXT: ODDSPREG (0x1)
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BE32-NEXT: ]
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BE32-NEXT: Flags 2: 0x0
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BE32-NEXT: }
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