llvm-mirror/test/MC/AArch64/adr.s
David Green 4fe2509252 [AArch64] Attempt to parse more operands as expressions
This tries to make use of evaluateAsRelocatable in AArch64AsmParser::classifySymbolRef
to parse more complex expressions as relocatable operands. It is hopefully better than
the existing code which only handles Symbol +- Constant.

This allows us to parse more complex adr/adrp, mov, ldr/str and add operands. It also
loosens the requirements on parsing addends in ld/st and mov's and adds a number of
tests.

Differential Revision: https://reviews.llvm.org/D51792

llvm-svn: 342455
2018-09-18 09:44:53 +00:00

38 lines
1.3 KiB
ArmAsm

// RUN: llvm-mc -triple aarch64-elf -filetype=obj %s -o - | llvm-objdump -d -r - | FileCheck %s
// CHECK: adr x0, #100
// CHECK-NEXT: adr x2, #0
// CHECK-NEXT: R_AARCH64_ADR_PREL_LO21 Symbol
// CHECK-NEXT: adr x3, #0
// CHECK-NEXT: R_AARCH64_ADR_PREL_LO21 Symbol
// CHECK-NEXT: adr x4, #0
// CHECK-NEXT: R_AARCH64_ADR_PREL_LO21 Symbol+987136
// CHECK-NEXT: adr x5, #0
// CHECK-NEXT: R_AARCH64_ADR_PREL_LO21 Symbol+987136
// CHECK-NEXT: adr x6, #0
// CHECK-NEXT: R_AARCH64_ADR_PREL_LO21 Symbol+987136
adr x0, 100
adr x2, Symbol
adr x3, Symbol + 0
adr x4, Symbol + 987136
adr x5, (0xffffffff000f1000 - 0xffffffff00000000 + Symbol)
adr x6, Symbol + (0xffffffff000f1000 - 0xffffffff00000000)
// CHECK-NEXT: adrp x0, #0
// CHECK-NEXT: R_AARCH64_ADR_PREL_PG_HI21 Symbol
// CHECK-NEXT: adrp x2, #0
// CHECK-NEXT: R_AARCH64_ADR_PREL_PG_HI21 Symbol
// CHECK-NEXT: adrp x3, #0
// CHECK-NEXT: R_AARCH64_ADR_PREL_PG_HI21 Symbol+987136
// CHECK-NEXT: adrp x4, #0
// CHECK-NEXT: R_AARCH64_ADR_PREL_PG_HI21 Symbol+987136
// CHECK-NEXT: adrp x5, #0
// CHECK-NEXT: R_AARCH64_ADR_PREL_PG_HI21 Symbol+987136
adrp x0, Symbol
adrp x2, Symbol + 0
adrp x3, Symbol + 987136
adrp x4, (0xffffffff000f1000 - 0xffffffff00000000 + Symbol)
adrp x5, Symbol + (0xffffffff000f1000 - 0xffffffff00000000)