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https://github.com/RPCS3/llvm-mirror.git
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a32d396d60
This change improves EmitLoweredSelect() so that multiple contiguous CMOV pseudo instructions with the same (or exactly opposite) conditions get lowered using a single new basic-block. This eliminates unnecessary extra basic-blocks (and CFG merge points) when contiguous CMOVs are being lowered. Patch by: kevin.b.smith@intel.com Differential Revision: http://reviews.llvm.org/D11428 llvm-svn: 244202
268 lines
9.4 KiB
LLVM
268 lines
9.4 KiB
LLVM
; RUN: llc < %s -mtriple=i386-linux-gnu -o - | FileCheck %s
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; This test checks that only a single js gets generated in the final code
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; for lowering the CMOV pseudos that get created for this IR.
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; CHECK-LABEL: foo1:
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; CHECK: js
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; CHECK-NOT: js
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define i32 @foo1(i32 %v1, i32 %v2, i32 %v3) nounwind {
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entry:
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%cmp = icmp slt i32 %v1, 0
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%v2.v3 = select i1 %cmp, i32 %v2, i32 %v3
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%v1.v2 = select i1 %cmp, i32 %v1, i32 %v2
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%sub = sub i32 %v1.v2, %v2.v3
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ret i32 %sub
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}
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; This test checks that only a single js gets generated in the final code
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; for lowering the CMOV pseudos that get created for this IR. This makes
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; sure the code for the lowering for opposite conditions gets tested.
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; CHECK-LABEL: foo11:
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; CHECK: js
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; CHECK-NOT: js
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; CHECK-NOT: jns
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define i32 @foo11(i32 %v1, i32 %v2, i32 %v3) nounwind {
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entry:
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%cmp1 = icmp slt i32 %v1, 0
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%v2.v3 = select i1 %cmp1, i32 %v2, i32 %v3
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%cmp2 = icmp sge i32 %v1, 0
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%v1.v2 = select i1 %cmp2, i32 %v1, i32 %v2
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%sub = sub i32 %v1.v2, %v2.v3
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ret i32 %sub
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}
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; This test checks that only a single js gets generated in the final code
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; for lowering the CMOV pseudos that get created for this IR.
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; CHECK-LABEL: foo2:
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; CHECK: js
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; CHECK-NOT: js
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define i32 @foo2(i8 %v1, i8 %v2, i8 %v3) nounwind {
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entry:
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%cmp = icmp slt i8 %v1, 0
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%v2.v3 = select i1 %cmp, i8 %v2, i8 %v3
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%v1.v2 = select i1 %cmp, i8 %v1, i8 %v2
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%t1 = sext i8 %v2.v3 to i32
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%t2 = sext i8 %v1.v2 to i32
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%sub = sub i32 %t1, %t2
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ret i32 %sub
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}
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; This test checks that only a single js gets generated in the final code
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; for lowering the CMOV pseudos that get created for this IR.
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; CHECK-LABEL: foo3:
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; CHECK: js
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; CHECK-NOT: js
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define i32 @foo3(i16 %v1, i16 %v2, i16 %v3) nounwind {
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entry:
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%cmp = icmp slt i16 %v1, 0
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%v2.v3 = select i1 %cmp, i16 %v2, i16 %v3
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%v1.v2 = select i1 %cmp, i16 %v1, i16 %v2
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%t1 = sext i16 %v2.v3 to i32
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%t2 = sext i16 %v1.v2 to i32
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%sub = sub i32 %t1, %t2
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ret i32 %sub
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}
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; This test checks that only a single js gets generated in the final code
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; for lowering the CMOV pseudos that get created for this IR.
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; CHECK-LABEL: foo4:
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; CHECK: js
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; CHECK-NOT: js
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define float @foo4(i32 %v1, float %v2, float %v3, float %v4) nounwind {
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entry:
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%cmp = icmp slt i32 %v1, 0
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%t1 = select i1 %cmp, float %v2, float %v3
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%t2 = select i1 %cmp, float %v3, float %v4
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%sub = fsub float %t1, %t2
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ret float %sub
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}
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; This test checks that only a single je gets generated in the final code
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; for lowering the CMOV pseudos that get created for this IR.
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; CHECK-LABEL: foo5:
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; CHECK: je
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; CHECK-NOT: je
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define double @foo5(i32 %v1, double %v2, double %v3, double %v4) nounwind {
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entry:
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%cmp = icmp eq i32 %v1, 0
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%t1 = select i1 %cmp, double %v2, double %v3
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%t2 = select i1 %cmp, double %v3, double %v4
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%sub = fsub double %t1, %t2
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ret double %sub
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}
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; This test checks that only a single je gets generated in the final code
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; for lowering the CMOV pseudos that get created for this IR.
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; CHECK-LABEL: foo6:
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; CHECK: je
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; CHECK-NOT: je
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define <4 x float> @foo6(i32 %v1, <4 x float> %v2, <4 x float> %v3, <4 x float> %v4) nounwind {
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entry:
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%cmp = icmp eq i32 %v1, 0
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%t1 = select i1 %cmp, <4 x float> %v2, <4 x float> %v3
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%t2 = select i1 %cmp, <4 x float> %v3, <4 x float> %v4
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%sub = fsub <4 x float> %t1, %t2
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ret <4 x float> %sub
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}
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; This test checks that only a single je gets generated in the final code
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; for lowering the CMOV pseudos that get created for this IR.
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; CHECK-LABEL: foo7:
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; CHECK: je
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; CHECK-NOT: je
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define <2 x double> @foo7(i32 %v1, <2 x double> %v2, <2 x double> %v3, <2 x double> %v4) nounwind {
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entry:
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%cmp = icmp eq i32 %v1, 0
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%t1 = select i1 %cmp, <2 x double> %v2, <2 x double> %v3
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%t2 = select i1 %cmp, <2 x double> %v3, <2 x double> %v4
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%sub = fsub <2 x double> %t1, %t2
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ret <2 x double> %sub
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}
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; This test checks that only a single ja gets generated in the final code
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; for lowering the CMOV pseudos that get created for this IR. This combines
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; all the supported types together into one long string of selects based
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; on the same condition.
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; CHECK-LABEL: foo8:
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; CHECK: ja
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; CHECK-NOT: ja
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define void @foo8(i32 %v1,
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i8 %v2, i8 %v3,
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i16 %v12, i16 %v13,
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i32 %v22, i32 %v23,
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float %v32, float %v33,
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double %v42, double %v43,
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<4 x float> %v52, <4 x float> %v53,
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<2 x double> %v62, <2 x double> %v63,
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<8 x float> %v72, <8 x float> %v73,
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<4 x double> %v82, <4 x double> %v83,
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<16 x float> %v92, <16 x float> %v93,
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<8 x double> %v102, <8 x double> %v103,
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i8 * %dst) nounwind {
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entry:
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%add.ptr11 = getelementptr inbounds i8, i8* %dst, i32 2
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%a11 = bitcast i8* %add.ptr11 to i16*
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%add.ptr21 = getelementptr inbounds i8, i8* %dst, i32 4
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%a21 = bitcast i8* %add.ptr21 to i32*
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%add.ptr31 = getelementptr inbounds i8, i8* %dst, i32 8
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%a31 = bitcast i8* %add.ptr31 to float*
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%add.ptr41 = getelementptr inbounds i8, i8* %dst, i32 16
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%a41 = bitcast i8* %add.ptr41 to double*
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%add.ptr51 = getelementptr inbounds i8, i8* %dst, i32 32
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%a51 = bitcast i8* %add.ptr51 to <4 x float>*
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%add.ptr61 = getelementptr inbounds i8, i8* %dst, i32 48
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%a61 = bitcast i8* %add.ptr61 to <2 x double>*
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%add.ptr71 = getelementptr inbounds i8, i8* %dst, i32 64
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%a71 = bitcast i8* %add.ptr71 to <8 x float>*
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%add.ptr81 = getelementptr inbounds i8, i8* %dst, i32 128
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%a81 = bitcast i8* %add.ptr81 to <4 x double>*
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%add.ptr91 = getelementptr inbounds i8, i8* %dst, i32 64
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%a91 = bitcast i8* %add.ptr91 to <16 x float>*
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%add.ptr101 = getelementptr inbounds i8, i8* %dst, i32 128
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%a101 = bitcast i8* %add.ptr101 to <8 x double>*
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; These operations are necessary, because select of two single use loads
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; ends up getting optimized into a select of two leas, followed by a
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; single load of the selected address.
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%t13 = xor i16 %v13, 11
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%t23 = xor i32 %v23, 1234
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%t33 = fadd float %v33, %v32
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%t43 = fadd double %v43, %v42
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%t53 = fadd <4 x float> %v53, %v52
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%t63 = fadd <2 x double> %v63, %v62
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%t73 = fsub <8 x float> %v73, %v72
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%t83 = fsub <4 x double> %v83, %v82
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%t93 = fsub <16 x float> %v93, %v92
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%t103 = fsub <8 x double> %v103, %v102
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%cmp = icmp ugt i32 %v1, 31
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%t11 = select i1 %cmp, i16 %v12, i16 %t13
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%t21 = select i1 %cmp, i32 %v22, i32 %t23
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%t31 = select i1 %cmp, float %v32, float %t33
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%t41 = select i1 %cmp, double %v42, double %t43
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%t51 = select i1 %cmp, <4 x float> %v52, <4 x float> %t53
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%t61 = select i1 %cmp, <2 x double> %v62, <2 x double> %t63
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%t71 = select i1 %cmp, <8 x float> %v72, <8 x float> %t73
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%t81 = select i1 %cmp, <4 x double> %v82, <4 x double> %t83
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%t91 = select i1 %cmp, <16 x float> %v92, <16 x float> %t93
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%t101 = select i1 %cmp, <8 x double> %v102, <8 x double> %t103
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store i16 %t11, i16* %a11, align 2
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store i32 %t21, i32* %a21, align 4
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store float %t31, float* %a31, align 4
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store double %t41, double* %a41, align 8
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store <4 x float> %t51, <4 x float>* %a51, align 16
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store <2 x double> %t61, <2 x double>* %a61, align 16
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store <8 x float> %t71, <8 x float>* %a71, align 32
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store <4 x double> %t81, <4 x double>* %a81, align 32
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store <16 x float> %t91, <16 x float>* %a91, align 32
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store <8 x double> %t101, <8 x double>* %a101, align 32
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ret void
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}
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; This test checks that only a single ja gets generated in the final code
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; for lowering the CMOV pseudos that get created for this IR.
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; on the same condition.
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; Contrary to my expectations, this doesn't exercise the code for
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; CMOV_V8I1, CMOV_V16I1, CMOV_V32I1, or CMOV_V64I1. Instead the selects all
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; get lowered into vector length number of selects, which all eventually turn
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; into a huge number of CMOV_GR8, which are all contiguous, so the optimization
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; kicks in as long as CMOV_GR8 is supported. I couldn't find a way to get
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; CMOV_V*I1 pseudo-opcodes to get generated. If a way exists to get CMOV_V*1
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; pseudo-opcodes to be generated, this test should be replaced with one that
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; tests those opcodes.
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;
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; CHECK-LABEL: foo9:
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; CHECK: ja
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; CHECK-NOT: ja
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define void @foo9(i32 %v1,
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<8 x i1> %v12, <8 x i1> %v13,
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<16 x i1> %v22, <16 x i1> %v23,
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<32 x i1> %v32, <32 x i1> %v33,
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<64 x i1> %v42, <64 x i1> %v43,
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i8 * %dst) nounwind {
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entry:
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%add.ptr11 = getelementptr inbounds i8, i8* %dst, i32 0
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%a11 = bitcast i8* %add.ptr11 to <8 x i1>*
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%add.ptr21 = getelementptr inbounds i8, i8* %dst, i32 4
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%a21 = bitcast i8* %add.ptr21 to <16 x i1>*
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%add.ptr31 = getelementptr inbounds i8, i8* %dst, i32 8
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%a31 = bitcast i8* %add.ptr31 to <32 x i1>*
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%add.ptr41 = getelementptr inbounds i8, i8* %dst, i32 16
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%a41 = bitcast i8* %add.ptr41 to <64 x i1>*
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; These operations are necessary, because select of two single use loads
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; ends up getting optimized into a select of two leas, followed by a
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; single load of the selected address.
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%t13 = xor <8 x i1> %v13, %v12
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%t23 = xor <16 x i1> %v23, %v22
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%t33 = xor <32 x i1> %v33, %v32
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%t43 = xor <64 x i1> %v43, %v42
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%cmp = icmp ugt i32 %v1, 31
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%t11 = select i1 %cmp, <8 x i1> %v12, <8 x i1> %t13
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%t21 = select i1 %cmp, <16 x i1> %v22, <16 x i1> %t23
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%t31 = select i1 %cmp, <32 x i1> %v32, <32 x i1> %t33
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%t41 = select i1 %cmp, <64 x i1> %v42, <64 x i1> %t43
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store <8 x i1> %t11, <8 x i1>* %a11, align 16
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store <16 x i1> %t21, <16 x i1>* %a21, align 4
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store <32 x i1> %t31, <32 x i1>* %a31, align 8
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store <64 x i1> %t41, <64 x i1>* %a41, align 16
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ret void
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}
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