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5c5b0311b8
We had duplicated definitions for the same hardware '[v]movq' instructions. For example with SSE:
def MOVZQI2PQIrr : RS2I<0x6E, MRMSrcReg, (outs VR128:$dst), (ins GR64:$src),
"mov{d|q}\t{$src, $dst|$dst, $src}", // X86-64 only
[(set VR128:$dst, (v2i64 (X86vzmovl (v2i64 (scalar_to_vector GR64:$src)))))],
IIC_SSE_MOVDQ>;
def MOV64toPQIrr : RS2I<0x6E, MRMSrcReg, (outs VR128:$dst), (ins GR64:$src),
"mov{d|q}\t{$src, $dst|$dst, $src}",
[(set VR128:$dst, (v2i64 (scalar_to_vector GR64:$src)))],
IIC_SSE_MOVDQ>, Sched<[WriteMove]>;
As shown in the test case and PR25554:
https://llvm.org/bugs/show_bug.cgi?id=25554
This causes us to miss reusing an operand because later passes don't know these 'movq' are the same instruction.
This patch deletes one pair of these defs.
Sadly, this won't fix the original test case in the bug report. Something else is still broken.
Differential Revision: http://reviews.llvm.org/D14941
llvm-svn: 253988
29 lines
1.0 KiB
LLVM
29 lines
1.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.1 | FileCheck %s --check-prefix=SSE
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=AVX
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define <2 x i64> @PR25554(<2 x i64> %v0, <2 x i64> %v1) {
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; SSE-LABEL: PR25554:
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; SSE: # BB#0:
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; SSE-NEXT: movl $1, %eax
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; SSE-NEXT: movd %rax, %xmm1
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; SSE-NEXT: por %xmm1, %xmm0
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; SSE-NEXT: pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1,2,3,4,5,6,7]
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; SSE-NEXT: paddq %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: PR25554:
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; AVX: # BB#0:
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; AVX-NEXT: movl $1, %eax
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; AVX-NEXT: vmovq %rax, %xmm1
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; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vpslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1,2,3,4,5,6,7]
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; AVX-NEXT: vpaddq %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%c1 = or <2 x i64> %v0, <i64 1, i64 0>
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%c2 = add <2 x i64> %c1, <i64 0, i64 1>
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ret <2 x i64> %c2
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}
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