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bbf11b1e1d
Use a PowerPC specific prolog epilog inserter to control where spilled callee save regs are placed on the stack. Get rid of implicit return address stack slot, save return address reg (LR) in appropriate slot Improve code generated for functions that don't have calls or access globals Note from Chris: PowerPCPEI will eventually be eliminated, once the functionality is merged into CodeGen/PrologEpilogInserter.cpp llvm-svn: 15536
43 lines
1.3 KiB
C++
43 lines
1.3 KiB
C++
//===-- PowerPC.h - Top-level interface for PowerPC representation -*- C++ -*-//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the entry points for global functions defined in the LLVM
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// PowerPC back-end.
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//
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//===----------------------------------------------------------------------===//
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#ifndef TARGET_POWERPC_H
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#define TARGET_POWERPC_H
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#include <iosfwd>
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namespace llvm {
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class FunctionPass;
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class TargetMachine;
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// Here is where you would define factory methods for powerpc-specific
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// passes. For example:
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FunctionPass *createPPCSimpleInstructionSelector(TargetMachine &TM);
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FunctionPass *createPPCCodePrinterPass(std::ostream &OS, TargetMachine &TM);
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FunctionPass *createPowerPCPEI();
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FunctionPass *createPPCBranchSelectionPass();
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} // end namespace llvm;
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// Defines symbolic names for PowerPC registers. This defines a mapping from
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// register name to register number.
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//
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#include "PowerPCGenRegisterNames.inc"
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// Defines symbolic names for the PowerPC instructions.
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//
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#include "PowerPCGenInstrNames.inc"
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#endif
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