Evan Cheng efd1f614ff Fix patterns for SSE4.1 move and sign extend instructions. Also add instructions which fold VZEXT_MOVL and VZEXT_LOAD. ...

llvm-svn: 56594

2008-09-24 23:27:55 +00:00

..

Alpha

allow this to pass.

2008-08-29 17:18:26 +00:00

ARM

Unallocatable registers do not have live intervals.

2008-09-17 18:36:25 +00:00

CBackend

In the CBackend, use casts to force integer add, subtract, and

2008-07-18 18:43:12 +00:00

CellSPU

Revert the "XFAIL" for the rotate_ops.ll testcase. Instead, mark ISD::ROTR

2008-08-31 02:59:23 +00:00

CPP

Put CPPBackend tests into their own directory and run them only if they're

2008-07-10 22:35:32 +00:00

Generic

Add a target triple; apparently LLVM doesn't use 64-bit

2008-09-08 20:16:18 +00:00

IA64

sabre brings to my attention that the 'tr' suffix is also obsolete

2008-05-20 21:00:03 +00:00

Mips

Added testcase for bswap allegrexel intrinsic

2008-09-15 19:38:11 +00:00

PowerPC

Remove SelectionDag early allocation of registers

2008-09-24 23:13:09 +00:00

SPARC

sabre brings to my attention that the 'tr' suffix is also obsolete

2008-05-20 21:00:03 +00:00

X86

Fix patterns for SSE4.1 move and sign extend instructions. Also add instructions which fold VZEXT_MOVL and VZEXT_LOAD.

2008-09-24 23:27:55 +00:00