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History

Oliver Stannard c5b828b36e [ARM] Re-commit r324600 with fixed LLVMBuild.txt

ARMDisassembler now depends on the banked register tables in ARMUtils, so the
LLVMBuild.txt needed updating to reflect this.

Original commit mesage:

[ARM] Fix disassembly of invalid banked register moves

When disassembling banked register move instructions, we don't have an
assembly syntax for the unallocated register numbers, so we have to
return Fail rather than SoftFail. Previously we were returning SoftFail,
then crashing in the InstPrinter as we have no way to represent these
encodings in an assembly string.

This also switches the decoder to use the table-generated list of banked
registers, removing the duplicated list of encodings.

Differential revision: https://reviews.llvm.org/D43066

llvm-svn: 324606

2018-02-08 14:31:22 +00:00

AArch64

[AArch64] Fix spelling of ICH_ELRSR_EL2 system register

2018-02-06 09:39:04 +00:00

AMDGPU

[AMDGPU][MC] Corrected dst/data size for MIMG opcodes with d16 modifier

2018-02-05 14:18:53 +00:00

ARC

[ARC] Add instruction subset for the ARC backend.

2017-12-02 05:25:17 +00:00

ARM

[ARM] Re-commit r324600 with fixed LLVMBuild.txt