Daniel Sanders f2ad4fc3ec [mips][microMIPS] Fix an invalid read for lwm32 and reserved reglist values. ... Summary: Some values of 'reglist' are reserved and cause the disassembler to read past the end of the Regs array. Treat lwm32's containing reserved values as invalid instructions. Reviewers: zoran.jovanovic Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D12959 llvm-svn: 247990		2015-09-18 14:20:54 +00:00
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AArch64	[AArch64] Fix problems in decoding generic MSR instructions	2015-07-15 08:10:30 +00:00
ARM	[ARM] Add v8.1a "Privileged Access Never" extension	2015-04-16 11:34:25 +00:00
Hexagon	[Hexagon] Adding decoders for signed operands and ensuring all signed operand types disassemble correctly.	2015-06-10 16:52:32 +00:00
Mips	[mips][microMIPS] Fix an invalid read for lwm32 and reserved reglist values.	2015-09-18 14:20:54 +00:00
PowerPC	Scalar to vector conversions using direct moves	2015-08-13 17:40:44 +00:00
Sparc	[Sparc] Implement i64 load/store support for 32-bit sparc.	2015-08-10 19:11:39 +00:00
SystemZ	[SystemZ] Add z13 vector facility and MC support	2015-05-05 19:23:40 +00:00
X86	[llvm-mc] Ignore opcode size prefix in 64-bit CALL disassembly	2015-08-26 16:20:29 +00:00
XCore	Reduce verbiage of lit.local.cfg files	2014-06-09 22:42:55 +00:00