Jakob Stoklund Olesen 94c30c8409 Pass to verify generated machine code.
The following is checked:

* Operand counts: All explicit operands must be present.

* Register classes: All physical and virtual register operands must be
  compatible with the register class required by the instruction descriptor.

* Register live intervals: Registers must be defined only once, and must be
  defined before use.

The machine code verifier is enabled with the command-line option
'-verify-machineinstrs', or by defining the environment variable
LLVM_VERIFY_MACHINEINSTRS to the name of a file that will receive all the
verifier errors.

llvm-svn: 71918
2009-05-16 00:33:53 +00:00
..
2009-05-14 18:26:15 +00:00
2009-01-15 20:18:42 +00:00
2009-03-13 04:39:26 +00:00
2009-05-14 23:23:37 +00:00
2009-03-02 09:01:14 +00:00