Hal Finkel fd26145bc6 Add instruction itinerary for the PPC64 A2 core. ...

This adds a full itinerary for IBM's PPC64 A2 embedded core. These
cores form the basis for the CPUs in the new IBM BG/Q supercomputer.

llvm-svn: 153842

2012-04-01 19:22:40 +00:00

..

ARM

ARM target should allow codegenprep to duplicate ret instructions to enable tailcall opt. rdar://11140249

2012-03-30 01:24:39 +00:00

CellSPU

Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu

2012-03-25 09:02:19 +00:00

CPP

Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu

2012-03-25 09:02:19 +00:00

Generic

Add testcase for r153705

2012-03-30 00:05:02 +00:00

Hexagon

Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu

2012-03-25 09:02:19 +00:00

MBlaze

Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu

2012-03-25 09:02:19 +00:00

Mips

Expand FREM.

2012-03-29 18:43:11 +00:00

MSP430

Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu

2012-03-25 09:02:19 +00:00

PowerPC

Add instruction itinerary for the PPC64 A2 core.

2012-04-01 19:22:40 +00:00

PTX

Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu

2012-03-25 09:02:19 +00:00

SPARC

Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu

2012-03-25 09:02:19 +00:00

Thumb

Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu

2012-03-25 09:02:19 +00:00

Thumb2

Don't kill the base register when expanding strd.

2012-03-28 23:07:03 +00:00

X86

Add a triple to the test.

2012-03-31 18:59:07 +00:00

XCore

Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu

2012-03-25 09:02:19 +00:00