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[x86] move combines of 'select of 2 constants' to its own function; NFC
There are missing folds here and possibly folds that could be made generic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@280817 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sanjay Patel
parent
0639c00041
commit
05601b46da
@ -27052,6 +27052,107 @@ static SDValue combineVSelectWithAllOnesOrZeros(SDNode *N, SelectionDAG &DAG) {
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return DAG.getBitcast(VT, Ret);
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return DAG.getBitcast(VT, Ret);
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}
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}
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static SDValue combineSelectOfTwoConstants(SDNode *N, SelectionDAG &DAG) {
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SDValue Cond = N->getOperand(0);
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SDValue LHS = N->getOperand(1);
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SDValue RHS = N->getOperand(2);
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SDLoc DL(N);
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auto *TrueC = dyn_cast<ConstantSDNode>(LHS);
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auto *FalseC = dyn_cast<ConstantSDNode>(RHS);
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if (!TrueC || !FalseC)
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return SDValue();
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// Don't do this for crazy integer types.
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if (!DAG.getTargetLoweringInfo().isTypeLegal(LHS.getValueType()))
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return SDValue();
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// If this is efficiently invertible, canonicalize the LHSC/RHSC values
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// so that TrueC (the true value) is larger than FalseC.
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bool NeedsCondInvert = false;
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if (TrueC->getAPIntValue().ult(FalseC->getAPIntValue()) &&
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// Efficiently invertible.
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(Cond.getOpcode() == ISD::SETCC || // setcc -> invertible.
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(Cond.getOpcode() == ISD::XOR && // xor(X, C) -> invertible.
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isa<ConstantSDNode>(Cond.getOperand(1))))) {
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NeedsCondInvert = true;
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std::swap(TrueC, FalseC);
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}
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// Optimize C ? 8 : 0 -> zext(C) << 3. Likewise for any pow2/0.
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if (FalseC->getAPIntValue() == 0 && TrueC->getAPIntValue().isPowerOf2()) {
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if (NeedsCondInvert) // Invert the condition if needed.
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Cond = DAG.getNode(ISD::XOR, DL, Cond.getValueType(), Cond,
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DAG.getConstant(1, DL, Cond.getValueType()));
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// Zero extend the condition if needed.
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Cond = DAG.getNode(ISD::ZERO_EXTEND, DL, LHS.getValueType(), Cond);
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unsigned ShAmt = TrueC->getAPIntValue().logBase2();
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return DAG.getNode(ISD::SHL, DL, LHS.getValueType(), Cond,
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DAG.getConstant(ShAmt, DL, MVT::i8));
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}
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// Optimize Cond ? cst+1 : cst -> zext(setcc(C)+cst.
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if (FalseC->getAPIntValue() + 1 == TrueC->getAPIntValue()) {
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if (NeedsCondInvert) // Invert the condition if needed.
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Cond = DAG.getNode(ISD::XOR, DL, Cond.getValueType(), Cond,
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DAG.getConstant(1, DL, Cond.getValueType()));
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// Zero extend the condition if needed.
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Cond = DAG.getNode(ISD::ZERO_EXTEND, DL, FalseC->getValueType(0), Cond);
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return DAG.getNode(ISD::ADD, DL, Cond.getValueType(), Cond,
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SDValue(FalseC, 0));
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}
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// Optimize cases that will turn into an LEA instruction. This requires
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// an i32 or i64 and an efficient multiplier (1, 2, 3, 4, 5, 8, 9).
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if (N->getValueType(0) == MVT::i32 || N->getValueType(0) == MVT::i64) {
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uint64_t Diff = TrueC->getZExtValue() - FalseC->getZExtValue();
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if (N->getValueType(0) == MVT::i32)
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Diff = (unsigned)Diff;
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bool isFastMultiplier = false;
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if (Diff < 10) {
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switch ((unsigned char)Diff) {
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default:
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break;
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case 1: // result = add base, cond
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case 2: // result = lea base( , cond*2)
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case 3: // result = lea base(cond, cond*2)
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case 4: // result = lea base( , cond*4)
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case 5: // result = lea base(cond, cond*4)
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case 8: // result = lea base( , cond*8)
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case 9: // result = lea base(cond, cond*8)
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isFastMultiplier = true;
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break;
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}
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}
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if (isFastMultiplier) {
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APInt Diff = TrueC->getAPIntValue() - FalseC->getAPIntValue();
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if (NeedsCondInvert) // Invert the condition if needed.
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Cond = DAG.getNode(ISD::XOR, DL, Cond.getValueType(), Cond,
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DAG.getConstant(1, DL, Cond.getValueType()));
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// Zero extend the condition if needed.
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Cond = DAG.getNode(ISD::ZERO_EXTEND, DL, FalseC->getValueType(0), Cond);
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// Scale the condition by the difference.
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if (Diff != 1)
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Cond = DAG.getNode(ISD::MUL, DL, Cond.getValueType(), Cond,
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DAG.getConstant(Diff, DL, Cond.getValueType()));
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// Add the base if non-zero.
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if (FalseC->getAPIntValue() != 0)
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Cond = DAG.getNode(ISD::ADD, DL, Cond.getValueType(), Cond,
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SDValue(FalseC, 0));
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return Cond;
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}
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}
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return SDValue();
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}
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/// Do target-specific dag combines on SELECT and VSELECT nodes.
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/// Do target-specific dag combines on SELECT and VSELECT nodes.
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static SDValue combineSelect(SDNode *N, SelectionDAG &DAG,
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static SDValue combineSelect(SDNode *N, SelectionDAG &DAG,
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TargetLowering::DAGCombinerInfo &DCI,
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TargetLowering::DAGCombinerInfo &DCI,
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@ -27228,99 +27329,9 @@ static SDValue combineSelect(SDNode *N, SelectionDAG &DAG,
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return DAG.getNode(N->getOpcode(), DL, OpVT, Cond, LHS, RHS);
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return DAG.getNode(N->getOpcode(), DL, OpVT, Cond, LHS, RHS);
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}
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}
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}
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}
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// If this is a select between two integer constants, try to do some
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// optimizations.
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if (ConstantSDNode *TrueC = dyn_cast<ConstantSDNode>(LHS)) {
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if (ConstantSDNode *FalseC = dyn_cast<ConstantSDNode>(RHS))
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// Don't do this for crazy integer types.
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if (DAG.getTargetLoweringInfo().isTypeLegal(LHS.getValueType())) {
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// If this is efficiently invertible, canonicalize the LHSC/RHSC values
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// so that TrueC (the true value) is larger than FalseC.
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bool NeedsCondInvert = false;
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if (TrueC->getAPIntValue().ult(FalseC->getAPIntValue()) &&
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if (SDValue V = combineSelectOfTwoConstants(N, DAG))
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// Efficiently invertible.
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return V;
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(Cond.getOpcode() == ISD::SETCC || // setcc -> invertible.
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(Cond.getOpcode() == ISD::XOR && // xor(X, C) -> invertible.
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isa<ConstantSDNode>(Cond.getOperand(1))))) {
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NeedsCondInvert = true;
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std::swap(TrueC, FalseC);
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}
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// Optimize C ? 8 : 0 -> zext(C) << 3. Likewise for any pow2/0.
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if (FalseC->getAPIntValue() == 0 &&
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TrueC->getAPIntValue().isPowerOf2()) {
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if (NeedsCondInvert) // Invert the condition if needed.
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Cond = DAG.getNode(ISD::XOR, DL, Cond.getValueType(), Cond,
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DAG.getConstant(1, DL, Cond.getValueType()));
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// Zero extend the condition if needed.
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Cond = DAG.getNode(ISD::ZERO_EXTEND, DL, LHS.getValueType(), Cond);
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unsigned ShAmt = TrueC->getAPIntValue().logBase2();
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return DAG.getNode(ISD::SHL, DL, LHS.getValueType(), Cond,
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DAG.getConstant(ShAmt, DL, MVT::i8));
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}
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// Optimize Cond ? cst+1 : cst -> zext(setcc(C)+cst.
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if (FalseC->getAPIntValue()+1 == TrueC->getAPIntValue()) {
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if (NeedsCondInvert) // Invert the condition if needed.
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Cond = DAG.getNode(ISD::XOR, DL, Cond.getValueType(), Cond,
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DAG.getConstant(1, DL, Cond.getValueType()));
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// Zero extend the condition if needed.
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Cond = DAG.getNode(ISD::ZERO_EXTEND, DL,
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FalseC->getValueType(0), Cond);
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return DAG.getNode(ISD::ADD, DL, Cond.getValueType(), Cond,
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SDValue(FalseC, 0));
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}
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// Optimize cases that will turn into an LEA instruction. This requires
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// an i32 or i64 and an efficient multiplier (1, 2, 3, 4, 5, 8, 9).
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if (N->getValueType(0) == MVT::i32 || N->getValueType(0) == MVT::i64) {
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uint64_t Diff = TrueC->getZExtValue()-FalseC->getZExtValue();
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if (N->getValueType(0) == MVT::i32) Diff = (unsigned)Diff;
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bool isFastMultiplier = false;
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if (Diff < 10) {
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switch ((unsigned char)Diff) {
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default: break;
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case 1: // result = add base, cond
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case 2: // result = lea base( , cond*2)
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case 3: // result = lea base(cond, cond*2)
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case 4: // result = lea base( , cond*4)
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case 5: // result = lea base(cond, cond*4)
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case 8: // result = lea base( , cond*8)
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case 9: // result = lea base(cond, cond*8)
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isFastMultiplier = true;
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break;
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}
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}
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if (isFastMultiplier) {
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APInt Diff = TrueC->getAPIntValue()-FalseC->getAPIntValue();
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if (NeedsCondInvert) // Invert the condition if needed.
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Cond = DAG.getNode(ISD::XOR, DL, Cond.getValueType(), Cond,
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DAG.getConstant(1, DL, Cond.getValueType()));
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// Zero extend the condition if needed.
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Cond = DAG.getNode(ISD::ZERO_EXTEND, DL, FalseC->getValueType(0),
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Cond);
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// Scale the condition by the difference.
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if (Diff != 1)
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Cond = DAG.getNode(ISD::MUL, DL, Cond.getValueType(), Cond,
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DAG.getConstant(Diff, DL,
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Cond.getValueType()));
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// Add the base if non-zero.
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if (FalseC->getAPIntValue() != 0)
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Cond = DAG.getNode(ISD::ADD, DL, Cond.getValueType(), Cond,
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SDValue(FalseC, 0));
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return Cond;
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}
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}
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}
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}
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// Canonicalize max and min:
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// Canonicalize max and min:
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// (x > y) ? x : y -> (x >= y) ? x : y
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// (x > y) ? x : y -> (x >= y) ? x : y
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