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https://github.com/RPCS3/llvm.git
synced 2026-07-19 15:13:49 -04:00
[ARM] Sink add/mul(shufflevector(insertelement())) for MVE instruction selection
This patch sinks add/mul(shufflevector(insertelement())) into the basic block in which they are used so that they can then be selected together. This is useful for various MVE instructions, such as vmla and others that take R registers. Loop tests have been added to the vmla test file to make sure vmlas are generated in loops. Differential revision: https://reviews.llvm.org/D66295 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371218 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sam Tebbs
@@ -14340,22 +14340,60 @@ static bool areExtractExts(Value *Ext1, Value *Ext2) {
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/// sext/zext can be folded into vsubl.
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bool ARMTargetLowering::shouldSinkOperands(Instruction *I,
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SmallVectorImpl<Use *> &Ops) const {
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if (!Subtarget->hasNEON() || !I->getType()->isVectorTy())
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if (!I->getType()->isVectorTy())
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return false;
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switch (I->getOpcode()) {
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case Instruction::Sub:
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case Instruction::Add: {
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if (!areExtractExts(I->getOperand(0), I->getOperand(1)))
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if (Subtarget->hasNEON()) {
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switch (I->getOpcode()) {
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case Instruction::Sub:
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case Instruction::Add: {
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if (!areExtractExts(I->getOperand(0), I->getOperand(1)))
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return false;
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Ops.push_back(&I->getOperandUse(0));
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Ops.push_back(&I->getOperandUse(1));
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return true;
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}
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default:
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return false;
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Ops.push_back(&I->getOperandUse(0));
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Ops.push_back(&I->getOperandUse(1));
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return true;
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}
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}
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default:
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if (!Subtarget->hasMVEIntegerOps())
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return false;
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auto IsSinker = [](Instruction *I, int Operand) {
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switch (I->getOpcode()) {
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case Instruction::Add:
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case Instruction::Mul:
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return true;
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case Instruction::Sub:
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return Operand == 1;
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default:
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return false;
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}
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};
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int Op = 0;
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if (!isa<ShuffleVectorInst>(I->getOperand(Op)))
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Op = 1;
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if (!IsSinker(I, Op))
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return false;
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if (!match(I->getOperand(Op),
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m_ShuffleVector(m_InsertElement(m_Undef(), m_Value(), m_ZeroInt()),
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m_Undef(), m_Zero()))) {
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return false;
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}
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return false;
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Instruction *Shuffle = cast<Instruction>(I->getOperand(Op));
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// All uses of the shuffle should be sunk to avoid duplicating it across gpr
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// and vector registers
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for (Use &U : Shuffle->uses()) {
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Instruction *Insn = cast<Instruction>(U.getUser());
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if (!IsSinker(Insn, U.getOperandNo()))
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return false;
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}
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Ops.push_back(&Shuffle->getOperandUse(0));
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Ops.push_back(&I->getOperandUse(Op));
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return true;
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}
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bool ARMTargetLowering::isVectorLoadExtDesirable(SDValue ExtVal) const {
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@@ -78,3 +78,125 @@ entry:
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ret <16 x i8> %3
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}
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define void @vmla32_in_loop(i32* %s1, i32 %x, i32* %d, i32 %n) {
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; CHECK-LABEL: vmla32_in_loop:
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; CHECK: .LBB6_1: @ %vector.body
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; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: vldrw.u32 q0, [r0, #16]!
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; CHECK-NEXT: vldrw.u32 q1, [r2, #16]!
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; CHECK-NEXT: vmla.u32 q1, q0, r1
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; CHECK-NEXT: vstrw.32 q1, [r2]
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; CHECK-NEXT: le lr, .LBB6_1
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; CHECK-NEXT: @ %bb.2: @ %for.cond.cleanup
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; CHECK-NEXT: pop {r7, pc}
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entry:
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%cmp6 = icmp sgt i32 %n, 0
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br i1 %cmp6, label %vector.ph, label %for.cond.cleanup
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vector.ph: ; preds = %for.body.preheader
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%n.vec = and i32 %n, -4
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%broadcast.splatinsert8 = insertelement <4 x i32> undef, i32 %x, i32 0
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%broadcast.splat9 = shufflevector <4 x i32> %broadcast.splatinsert8, <4 x i32> undef, <4 x i32> zeroinitializer
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br label %vector.body
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vector.body: ; preds = %vector.body, %vector.ph
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%index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
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%0 = getelementptr inbounds i32, i32* %s1, i32 %index
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%1 = bitcast i32* %0 to <4 x i32>*
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%wide.load = load <4 x i32>, <4 x i32>* %1, align 4
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%2 = mul nsw <4 x i32> %wide.load, %broadcast.splat9
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%3 = getelementptr inbounds i32, i32* %d, i32 %index
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%4 = bitcast i32* %3 to <4 x i32>*
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%wide.load10 = load <4 x i32>, <4 x i32>* %4, align 4
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%5 = add nsw <4 x i32> %wide.load10, %2
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%6 = bitcast i32* %3 to <4 x i32>*
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store <4 x i32> %5, <4 x i32>* %6, align 4
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%index.next = add i32 %index, 4
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%7 = icmp eq i32 %index.next, %n.vec
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br i1 %7, label %for.cond.cleanup, label %vector.body
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for.cond.cleanup: ; preds = %for.body, %middle.block, %entry
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ret void
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}
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define void @vmla16_in_loop(i16* %s1, i16 %x, i16* %d, i32 %n) {
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; CHECK-LABEL: vmla16_in_loop:
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; CHECK: .LBB7_1: @ %vector.body
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; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: vldrh.u16 q0, [r0, #16]!
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; CHECK-NEXT: vldrh.u16 q1, [r2, #16]!
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; CHECK-NEXT: vmla.u16 q1, q0, r1
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; CHECK-NEXT: vstrh.16 q1, [r2]
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; CHECK-NEXT: le lr, .LBB7_1
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; CHECK-NEXT: @ %bb.2: @ %for.cond.cleanup
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; CHECK-NEXT: pop {r7, pc}
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entry:
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%cmp6 = icmp sgt i32 %n, 0
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br i1 %cmp6, label %vector.ph, label %for.cond.cleanup
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vector.ph: ; preds = %for.body.preheader
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%n.vec = and i32 %n, -8
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%broadcast.splatinsert11 = insertelement <8 x i16> undef, i16 %x, i32 0
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%broadcast.splat12 = shufflevector <8 x i16> %broadcast.splatinsert11, <8 x i16> undef, <8 x i32> zeroinitializer
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br label %vector.body
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vector.body: ; preds = %vector.body, %vector.ph
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%index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
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%0 = getelementptr inbounds i16, i16* %s1, i32 %index
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%1 = bitcast i16* %0 to <8 x i16>*
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%wide.load = load <8 x i16>, <8 x i16>* %1, align 2
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%2 = mul <8 x i16> %wide.load, %broadcast.splat12
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%3 = getelementptr inbounds i16, i16* %d, i32 %index
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%4 = bitcast i16* %3 to <8 x i16>*
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%wide.load13 = load <8 x i16>, <8 x i16>* %4, align 2
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%5 = add <8 x i16> %2, %wide.load13
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%6 = bitcast i16* %3 to <8 x i16>*
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store <8 x i16> %5, <8 x i16>* %6, align 2
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%index.next = add i32 %index, 8
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%7 = icmp eq i32 %index.next, %n.vec
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br i1 %7, label %for.cond.cleanup, label %vector.body
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for.cond.cleanup: ; preds = %for.body, %middle.block, %entry
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ret void
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}
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define void @vmla8_in_loop(i8* %s1, i8 %x, i8* %d, i32 %n) {
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; CHECK-LABEL: vmla8_in_loop:
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; CHECK: .LBB8_1: @ %vector.body
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; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: vldrh.u16 q0, [r0, #8]!
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; CHECK-NEXT: vldrh.u16 q1, [r2, #8]!
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; CHECK-NEXT: vmla.u8 q1, q0, r1
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; CHECK-NEXT: vstrh.16 q1, [r2]
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; CHECK-NEXT: le lr, .LBB8_1
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; CHECK-NEXT: @ %bb.2: @ %for.cond.cleanup
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; CHECK-NEXT: pop {r7, pc}
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entry:
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%cmp6 = icmp sgt i32 %n, 0
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br i1 %cmp6, label %vector.ph, label %for.cond.cleanup
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vector.ph: ; preds = %for.body.preheader
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%n.vec = and i32 %n, -8
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%broadcast.splatinsert11 = insertelement <16 x i8> undef, i8 %x, i32 0
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%broadcast.splat12 = shufflevector <16 x i8> %broadcast.splatinsert11, <16 x i8> undef, <16 x i32> zeroinitializer
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br label %vector.body
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vector.body: ; preds = %vector.body, %vector.ph
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%index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
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%0 = getelementptr inbounds i8, i8* %s1, i32 %index
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%1 = bitcast i8* %0 to <16 x i8>*
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%wide.load = load <16 x i8>, <16 x i8>* %1, align 2
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%2 = mul <16 x i8> %wide.load, %broadcast.splat12
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%3 = getelementptr inbounds i8, i8* %d, i32 %index
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%4 = bitcast i8* %3 to <16 x i8>*
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%wide.load13 = load <16 x i8>, <16 x i8>* %4, align 2
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%5 = add <16 x i8> %2, %wide.load13
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%6 = bitcast i8* %3 to <16 x i8>*
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store <16 x i8> %5, <16 x i8>* %6, align 2
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%index.next = add i32 %index, 8
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%7 = icmp eq i32 %index.next, %n.vec
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br i1 %7, label %for.cond.cleanup, label %vector.body
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for.cond.cleanup: ; preds = %for.body, %middle.block, %entry
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ret void
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}
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@@ -0,0 +1,216 @@
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; RUN: opt -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=+mve.fp < %s -codegenprepare -S | FileCheck -check-prefix=CHECK %s
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define void @sink_add_mul(i32* %s1, i32 %x, i32* %d, i32 %n) {
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; CHECK-LABEL: @sink_add_mul(
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; CHECK: vector.ph:
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; CHECK-NOT: [[BROADCAST_SPLATINSERT8:%.*]] = insertelement <4 x i32> undef, i32 [[X:%.*]], i32 0
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; CHECK-NOT: [[BROADCAST_SPLAT9:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT8]], <4 x i32> undef, <4 x i32> zeroinitializer
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; CHECK: vector.body:
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; CHECK: [[TMP2:%.*]] = insertelement <4 x i32> undef, i32 [[X:%.*]], i32 0
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; CHECK: [[TMP3:%.*]] = shufflevector <4 x i32> [[TMP2]], <4 x i32> undef, <4 x i32> zeroinitializer
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;
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entry:
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%cmp6 = icmp sgt i32 %n, 0
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br i1 %cmp6, label %vector.ph, label %for.cond.cleanup
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vector.ph: ; preds = %for.body.preheader
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%n.vec = and i32 %n, -4
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%broadcast.splatinsert8 = insertelement <4 x i32> undef, i32 %x, i32 0
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%broadcast.splat9 = shufflevector <4 x i32> %broadcast.splatinsert8, <4 x i32> undef, <4 x i32> zeroinitializer
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br label %vector.body
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vector.body: ; preds = %vector.body, %vector.ph
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%index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
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%0 = getelementptr inbounds i32, i32* %s1, i32 %index
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%1 = bitcast i32* %0 to <4 x i32>*
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%wide.load = load <4 x i32>, <4 x i32>* %1, align 4
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%2 = mul nsw <4 x i32> %wide.load, %broadcast.splat9
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%3 = getelementptr inbounds i32, i32* %d, i32 %index
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%4 = bitcast i32* %3 to <4 x i32>*
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%wide.load10 = load <4 x i32>, <4 x i32>* %4, align 4
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%5 = add nsw <4 x i32> %wide.load10, %2
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%6 = bitcast i32* %3 to <4 x i32>*
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store <4 x i32> %5, <4 x i32>* %6, align 4
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%index.next = add i32 %index, 4
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%7 = icmp eq i32 %index.next, %n.vec
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br i1 %7, label %for.cond.cleanup, label %vector.body
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for.cond.cleanup: ; preds = %for.body, %middle.block, %entry
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ret void
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}
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define void @sink_add_mul_multiple(i32* %s1, i32* %s2, i32 %x, i32* %d, i32* %d2, i32 %n) {
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; CHECK-LABEL: @sink_add_mul_multiple(
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; CHECK: vector.ph:
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; CHECK-NOT: [[BROADCAST_SPLATINSERT8:%.*]] = insertelement <4 x i32> undef, i32 [[X:%.*]], i32 0
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; CHECK-NOT: [[BROADCAST_SPLAT9:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT8]], <4 x i32> undef, <4 x i32> zeroinitializer
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; CHECK: vector.body:
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; CHECK: [[TMP2:%.*]] = insertelement <4 x i32> undef, i32 [[X:%.*]], i32 0
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; CHECK: [[TMP3:%.*]] = shufflevector <4 x i32> [[TMP2]], <4 x i32> undef, <4 x i32> zeroinitializer
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; CHECK: [[TMP11:%.*]] = shufflevector <4 x i32> [[TMP2]], <4 x i32> undef, <4 x i32> zeroinitializer
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;
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entry:
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%cmp13 = icmp sgt i32 %n, 0
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br i1 %cmp13, label %vector.ph, label %for.cond.cleanup
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vector.ph: ; preds = %for.body.preheader
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%n.vec = and i32 %n, -4
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%broadcast.splatinsert15 = insertelement <4 x i32> undef, i32 %x, i32 0
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%broadcast.splat16 = shufflevector <4 x i32> %broadcast.splatinsert15, <4 x i32> undef, <4 x i32> zeroinitializer
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br label %vector.body
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vector.body: ; preds = %vector.body, %vector.ph
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%index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
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%0 = getelementptr inbounds i32, i32* %s1, i32 %index
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%1 = bitcast i32* %0 to <4 x i32>*
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%wide.load = load <4 x i32>, <4 x i32>* %1, align 4
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%2 = mul nsw <4 x i32> %wide.load, %broadcast.splat16
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%3 = getelementptr inbounds i32, i32* %d, i32 %index
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%4 = bitcast i32* %3 to <4 x i32>*
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%wide.load17 = load <4 x i32>, <4 x i32>* %4, align 4
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%5 = add nsw <4 x i32> %wide.load17, %2
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%6 = bitcast i32* %3 to <4 x i32>*
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store <4 x i32> %5, <4 x i32>* %6, align 4
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%7 = getelementptr inbounds i32, i32* %s2, i32 %index
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%8 = bitcast i32* %7 to <4 x i32>*
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%wide.load18 = load <4 x i32>, <4 x i32>* %8, align 4
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%9 = mul nsw <4 x i32> %wide.load18, %broadcast.splat16
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%10 = getelementptr inbounds i32, i32* %d2, i32 %index
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%11 = bitcast i32* %10 to <4 x i32>*
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%wide.load19 = load <4 x i32>, <4 x i32>* %11, align 4
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%12 = add nsw <4 x i32> %wide.load19, %9
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%13 = bitcast i32* %10 to <4 x i32>*
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store <4 x i32> %12, <4 x i32>* %13, align 4
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%index.next = add i32 %index, 4
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%14 = icmp eq i32 %index.next, %n.vec
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br i1 %14, label %for.cond.cleanup, label %vector.body
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for.cond.cleanup: ; preds = %for.body, %middle.block, %entry
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ret void
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}
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define void @sink_add_sub_unsinkable(i32* %s1, i32* %s2, i32 %x, i32* %d, i32* %d2, i32 %n) {
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; CHECK-LABEL: @sink_add_sub_unsinkable(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP13:%.*]] = icmp sgt i32 [[N:%.*]], 0
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; CHECK-NEXT: br i1 [[CMP13]], label [[VECTOR_PH:%.*]], label [[FOR_COND_CLEANUP:%.*]]
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; CHECK: vector.ph:
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; CHECK-NEXT: [[N_VEC:%.*]] = and i32 [[N]], -4
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; CHECK-NEXT: [[BROADCAST_SPLATINSERT15:%.*]] = insertelement <4 x i32> undef, i32 [[X:%.*]], i32 0
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; CHECK-NEXT: [[BROADCAST_SPLAT16:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT15]], <4 x i32> undef, <4 x i32> zeroinitializer
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; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
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;
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entry:
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%cmp13 = icmp sgt i32 %n, 0
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br i1 %cmp13, label %vector.ph, label %for.cond.cleanup
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vector.ph: ; preds = %for.body.preheader
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%n.vec = and i32 %n, -4
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%broadcast.splatinsert15 = insertelement <4 x i32> undef, i32 %x, i32 0
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%broadcast.splat16 = shufflevector <4 x i32> %broadcast.splatinsert15, <4 x i32> undef, <4 x i32> zeroinitializer
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br label %vector.body
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vector.body: ; preds = %vector.body, %vector.ph
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%index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
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%0 = getelementptr inbounds i32, i32* %s1, i32 %index
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%1 = bitcast i32* %0 to <4 x i32>*
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%wide.load = load <4 x i32>, <4 x i32>* %1, align 4
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%2 = mul nsw <4 x i32> %wide.load, %broadcast.splat16
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%3 = getelementptr inbounds i32, i32* %d, i32 %index
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%4 = bitcast i32* %3 to <4 x i32>*
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%wide.load17 = load <4 x i32>, <4 x i32>* %4, align 4
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%5 = add nsw <4 x i32> %wide.load17, %2
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%6 = bitcast i32* %3 to <4 x i32>*
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store <4 x i32> %5, <4 x i32>* %6, align 4
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%7 = getelementptr inbounds i32, i32* %s2, i32 %index
|
||||
%8 = bitcast i32* %7 to <4 x i32>*
|
||||
%wide.load18 = load <4 x i32>, <4 x i32>* %8, align 4
|
||||
%9 = sub nsw <4 x i32> %broadcast.splat16, %wide.load18
|
||||
%10 = getelementptr inbounds i32, i32* %d2, i32 %index
|
||||
%11 = bitcast i32* %10 to <4 x i32>*
|
||||
%wide.load19 = load <4 x i32>, <4 x i32>* %11, align 4
|
||||
%12 = add nsw <4 x i32> %wide.load19, %9
|
||||
%13 = bitcast i32* %10 to <4 x i32>*
|
||||
store <4 x i32> %12, <4 x i32>* %13, align 4
|
||||
%index.next = add i32 %index, 4
|
||||
%14 = icmp eq i32 %index.next, %n.vec
|
||||
br i1 %14, label %for.cond.cleanup, label %vector.body
|
||||
|
||||
for.cond.cleanup: ; preds = %for.body, %middle.block, %entry
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @sink_sub(i32* %s1, i32 %x, i32* %d, i32 %n) {
|
||||
; CHECK-LABEL: @sink_sub(
|
||||
; CHECK: vector.ph:
|
||||
; CHECK-NOT: [[BROADCAST_SPLATINSERT8:%.*]] = insertelement <4 x i32> undef, i32 [[X:%.*]], i32 0
|
||||
; CHECK-NOT: [[BROADCAST_SPLAT9:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT8]], <4 x i32> undef, <4 x i32> zeroinitializer
|
||||
; CHECK: vector.body:
|
||||
; CHECK: [[TMP2:%.*]] = insertelement <4 x i32> undef, i32 [[X:%.*]], i32 0
|
||||
; CHECK: [[TMP3:%.*]] = shufflevector <4 x i32> [[TMP2]], <4 x i32> undef, <4 x i32> zeroinitializer
|
||||
;
|
||||
entry:
|
||||
%cmp6 = icmp sgt i32 %n, 0
|
||||
br i1 %cmp6, label %vector.ph, label %for.cond.cleanup
|
||||
|
||||
vector.ph: ; preds = %for.body.preheader
|
||||
%n.vec = and i32 %n, -4
|
||||
%broadcast.splatinsert8 = insertelement <4 x i32> undef, i32 %x, i32 0
|
||||
%broadcast.splat9 = shufflevector <4 x i32> %broadcast.splatinsert8, <4 x i32> undef, <4 x i32> zeroinitializer
|
||||
br label %vector.body
|
||||
|
||||
vector.body: ; preds = %vector.body, %vector.ph
|
||||
%index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
|
||||
%0 = getelementptr inbounds i32, i32* %s1, i32 %index
|
||||
%1 = bitcast i32* %0 to <4 x i32>*
|
||||
%wide.load = load <4 x i32>, <4 x i32>* %1, align 4
|
||||
%2 = sub nsw <4 x i32> %wide.load, %broadcast.splat9
|
||||
%3 = getelementptr inbounds i32, i32* %d, i32 %index
|
||||
%4 = bitcast i32* %3 to <4 x i32>*
|
||||
store <4 x i32> %2, <4 x i32>* %4, align 4
|
||||
%index.next = add i32 %index, 4
|
||||
%5 = icmp eq i32 %index.next, %n.vec
|
||||
br i1 %5, label %for.cond.cleanup, label %vector.body
|
||||
|
||||
for.cond.cleanup: ; preds = %for.body, %middle.block, %entry
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @sink_sub_unsinkable(i32* %s1, i32 %x, i32* %d, i32 %n) {
|
||||
entry:
|
||||
; CHECK-LABEL: @sink_sub_unsinkable(
|
||||
; CHECK: vector.ph:
|
||||
; CHECK-NEXT: [[N_VEC:%.*]] = and i32 [[N]], -4
|
||||
; CHECK-NEXT: [[BROADCAST_SPLATINSERT15:%.*]] = insertelement <4 x i32> undef, i32 [[X:%.*]], i32 0
|
||||
; CHECK-NEXT: [[BROADCAST_SPLAT16:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT15]], <4 x i32> undef, <4 x i32> zeroinitializer
|
||||
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
|
||||
; CHECK: vector.body:
|
||||
; CHECK-NOT: [[TMP2:%.*]] = insertelement <4 x i32> undef, i32 [[X:%.*]], i32 0
|
||||
; CHECK-NOT: [[TMP3:%.*]] = shufflevector <4 x i32> [[TMP2]], <4 x i32> undef, <4 x i32> zeroinitializer
|
||||
;
|
||||
%cmp6 = icmp sgt i32 %n, 0
|
||||
br i1 %cmp6, label %vector.ph, label %for.cond.cleanup
|
||||
|
||||
vector.ph: ; preds = %for.body.preheader
|
||||
%n.vec = and i32 %n, -4
|
||||
%broadcast.splatinsert8 = insertelement <4 x i32> undef, i32 %x, i32 0
|
||||
%broadcast.splat9 = shufflevector <4 x i32> %broadcast.splatinsert8, <4 x i32> undef, <4 x i32> zeroinitializer
|
||||
br label %vector.body
|
||||
|
||||
vector.body: ; preds = %vector.body, %vector.ph
|
||||
%index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
|
||||
%0 = getelementptr inbounds i32, i32* %s1, i32 %index
|
||||
%1 = bitcast i32* %0 to <4 x i32>*
|
||||
%wide.load = load <4 x i32>, <4 x i32>* %1, align 4
|
||||
%2 = sub nsw <4 x i32> %broadcast.splat9, %wide.load
|
||||
%3 = getelementptr inbounds i32, i32* %d, i32 %index
|
||||
%4 = bitcast i32* %3 to <4 x i32>*
|
||||
store <4 x i32> %2, <4 x i32>* %4, align 4
|
||||
%index.next = add i32 %index, 4
|
||||
%5 = icmp eq i32 %index.next, %n.vec
|
||||
br i1 %5, label %for.cond.cleanup, label %vector.body
|
||||
|
||||
for.cond.cleanup: ; preds = %for.body, %middle.block, %entry
|
||||
ret void
|
||||
}
|
||||
Reference in New Issue
Block a user