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[AMDGPU] Use GCN prefix in dpp_combine.mir. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@374607 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Stanislav Mekhanoshin
@@ -1,20 +1,20 @@
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# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=gcn-dpp-combine -verify-machineinstrs -o - %s | FileCheck %s
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# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=gcn-dpp-combine -verify-machineinstrs -o - %s | FileCheck %s -check-prefix=GCN
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---
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# old is undefined: only combine when masks are fully enabled and
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# bound_ctrl:0 is set, otherwise the result of DPP VALU op can be undefined.
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# CHECK-LABEL: name: old_is_undef
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# CHECK: %2:vgpr_32 = IMPLICIT_DEF
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# GCN-LABEL: name: old_is_undef
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# GCN: %2:vgpr_32 = IMPLICIT_DEF
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# VOP2:
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# CHECK: %4:vgpr_32 = V_ADD_U32_dpp %2, %0, %1, 1, 15, 15, 1, implicit $exec
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# CHECK: %6:vgpr_32 = V_ADD_U32_e32 %5, %1, implicit $exec
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# CHECK: %8:vgpr_32 = V_ADD_U32_e32 %7, %1, implicit $exec
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# CHECK: %10:vgpr_32 = V_ADD_U32_e32 %9, %1, implicit $exec
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# GCN: %4:vgpr_32 = V_ADD_U32_dpp %2, %0, %1, 1, 15, 15, 1, implicit $exec
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# GCN: %6:vgpr_32 = V_ADD_U32_e32 %5, %1, implicit $exec
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# GCN: %8:vgpr_32 = V_ADD_U32_e32 %7, %1, implicit $exec
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# GCN: %10:vgpr_32 = V_ADD_U32_e32 %9, %1, implicit $exec
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# VOP1:
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# CHECK: %12:vgpr_32 = V_NOT_B32_dpp %2, %0, 1, 15, 15, 1, implicit $exec
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# CHECK: %14:vgpr_32 = V_NOT_B32_e32 %13, implicit $exec
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# CHECK: %16:vgpr_32 = V_NOT_B32_e32 %15, implicit $exec
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# CHECK: %18:vgpr_32 = V_NOT_B32_e32 %17, implicit $exec
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# GCN: %12:vgpr_32 = V_NOT_B32_dpp %2, %0, 1, 15, 15, 1, implicit $exec
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# GCN: %14:vgpr_32 = V_NOT_B32_e32 %13, implicit $exec
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# GCN: %16:vgpr_32 = V_NOT_B32_e32 %15, implicit $exec
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# GCN: %18:vgpr_32 = V_NOT_B32_e32 %17, implicit $exec
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name: old_is_undef
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tracksRegLiveness: true
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body: |
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@@ -53,21 +53,21 @@ body: |
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# old is zero cases:
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# CHECK-LABEL: name: old_is_0
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# GCN-LABEL: name: old_is_0
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# VOP2:
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# case 1: old is zero, masks are fully enabled, bound_ctrl:0 is on:
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# the DPP mov result would be either zero ({src lane disabled}|{src lane is
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# out of range}) or active src lane result - can combine with old = undef.
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# undef is preffered as it makes life easier for the regalloc.
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# CHECK: [[U1:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
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# CHECK: %4:vgpr_32 = V_ADD_U32_dpp [[U1]], %0, %1, 1, 15, 15, 1, implicit $exec
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# GCN: [[U1:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
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# GCN: %4:vgpr_32 = V_ADD_U32_dpp [[U1]], %0, %1, 1, 15, 15, 1, implicit $exec
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# case 2: old is zero, masks are fully enabled, bound_ctrl:0 is off:
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# as the DPP mov old is zero this case is no different from case 1 - combine it
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# setting bound_ctrl0 on for the combined DPP VALU op to make old undefined
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# CHECK: [[U2:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
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# CHECK: %6:vgpr_32 = V_ADD_U32_dpp [[U2]], %0, %1, 1, 15, 15, 1, implicit $exec
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# GCN: [[U2:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
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# GCN: %6:vgpr_32 = V_ADD_U32_dpp [[U2]], %0, %1, 1, 15, 15, 1, implicit $exec
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# case 3: masks are partialy disabled, bound_ctrl:0 is on:
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# the DPP mov result would be either zero ({src lane disabled}|{src lane is
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@@ -77,7 +77,7 @@ body: |
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# with identity value.
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# Special case: the bound_ctrl for the combined DPP VALU op isn't important
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# here but let's make it off to keep the combiner's logic simpler.
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# CHECK: %8:vgpr_32 = V_ADD_U32_dpp %1, %0, %1, 1, 14, 15, 0, implicit $exec
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# GCN: %8:vgpr_32 = V_ADD_U32_dpp %1, %0, %1, 1, 14, 15, 0, implicit $exec
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# case 4: masks are partialy disabled, bound_ctrl:0 is off:
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# the DPP mov result would be either zero ({src lane disabled}|{src lane is
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@@ -85,19 +85,19 @@ body: |
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# active src lane result - can combine with old = src1 of the VALU op.
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# The VALU op should have the same masks as DPP mov as they select
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# lanes with identity value
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# CHECK: %10:vgpr_32 = V_ADD_U32_dpp %1, %0, %1, 1, 14, 15, 0, implicit $exec
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# GCN: %10:vgpr_32 = V_ADD_U32_dpp %1, %0, %1, 1, 14, 15, 0, implicit $exec
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# VOP1:
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# see case 1
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# CHECK: [[U3:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
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# CHECK: %12:vgpr_32 = V_NOT_B32_dpp [[U3]], %0, 1, 15, 15, 1, implicit $exec
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# GCN: [[U3:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
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# GCN: %12:vgpr_32 = V_NOT_B32_dpp [[U3]], %0, 1, 15, 15, 1, implicit $exec
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# see case 2
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# CHECK: [[U4:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
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# CHECK: %14:vgpr_32 = V_NOT_B32_dpp [[U4]], %0, 1, 15, 15, 1, implicit $exec
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# GCN: [[U4:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
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# GCN: %14:vgpr_32 = V_NOT_B32_dpp [[U4]], %0, 1, 15, 15, 1, implicit $exec
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# case 3 and 4 not appliable as there is no way to specify unchanged result
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# for the unary VALU op
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# CHECK: %16:vgpr_32 = V_NOT_B32_e32 %15, implicit $exec
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# CHECK: %18:vgpr_32 = V_NOT_B32_e32 %17, implicit $exec
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# GCN: %16:vgpr_32 = V_NOT_B32_e32 %15, implicit $exec
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# GCN: %18:vgpr_32 = V_NOT_B32_e32 %17, implicit $exec
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name: old_is_0
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tracksRegLiveness: true
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@@ -143,11 +143,11 @@ body: |
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# The DPP VALU op should have the same masks (and bctrl) as DPP mov as they
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# select lanes with identity value
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# CHECK-LABEL: name: nonzero_old_is_identity_masks_enabled_bctl_off
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# CHECK: %4:vgpr_32 = V_MUL_U32_U24_dpp %1, %0, %1, 1, 15, 15, 0, implicit $exec
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# CHECK: %7:vgpr_32 = V_AND_B32_dpp %1, %0, %1, 1, 15, 15, 0, implicit $exec
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# CHECK: %10:vgpr_32 = V_MAX_I32_dpp %1, %0, %1, 1, 15, 15, 0, implicit $exec
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# CHECK: %13:vgpr_32 = V_MIN_I32_dpp %1, %0, %1, 1, 15, 15, 0, implicit $exec
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# GCN-LABEL: name: nonzero_old_is_identity_masks_enabled_bctl_off
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# GCN: %4:vgpr_32 = V_MUL_U32_U24_dpp %1, %0, %1, 1, 15, 15, 0, implicit $exec
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# GCN: %7:vgpr_32 = V_AND_B32_dpp %1, %0, %1, 1, 15, 15, 0, implicit $exec
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# GCN: %10:vgpr_32 = V_MAX_I32_dpp %1, %0, %1, 1, 15, 15, 0, implicit $exec
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# GCN: %13:vgpr_32 = V_MIN_I32_dpp %1, %0, %1, 1, 15, 15, 0, implicit $exec
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name: nonzero_old_is_identity_masks_enabled_bctl_off
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tracksRegLiveness: true
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@@ -181,11 +181,11 @@ body: |
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# The DPP VALU op should have the same masks (and bctrl) as DPP mov as they
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# select lanes with identity value
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# CHECK-LABEL: name: nonzero_old_is_identity_masks_partially_disabled_bctl_off
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# CHECK: %4:vgpr_32 = V_MUL_U32_U24_dpp %1, %0, %1, 1, 14, 15, 0, implicit $exec
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# CHECK: %7:vgpr_32 = V_AND_B32_dpp %1, %0, %1, 1, 15, 14, 0, implicit $exec
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# CHECK: %10:vgpr_32 = V_MAX_I32_dpp %1, %0, %1, 1, 14, 15, 0, implicit $exec
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# CHECK: %13:vgpr_32 = V_MIN_I32_dpp %1, %0, %1, 1, 15, 14, 0, implicit $exec
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# GCN-LABEL: name: nonzero_old_is_identity_masks_partially_disabled_bctl_off
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# GCN: %4:vgpr_32 = V_MUL_U32_U24_dpp %1, %0, %1, 1, 14, 15, 0, implicit $exec
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# GCN: %7:vgpr_32 = V_AND_B32_dpp %1, %0, %1, 1, 15, 14, 0, implicit $exec
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# GCN: %10:vgpr_32 = V_MAX_I32_dpp %1, %0, %1, 1, 14, 15, 0, implicit $exec
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# GCN: %13:vgpr_32 = V_MIN_I32_dpp %1, %0, %1, 1, 15, 14, 0, implicit $exec
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name: nonzero_old_is_identity_masks_partially_disabled_bctl_off
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tracksRegLiveness: true
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@@ -219,11 +219,11 @@ body: |
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# 3. DPP mov's old value if the mov's dest VGPR write is disabled by masks
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# can't combine
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# CHECK-LABEL: name: nonzero_old_is_identity_masks_partially_disabled_bctl0
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# CHECK: %4:vgpr_32 = V_MUL_U32_U24_e32 %3, %1, implicit $exec
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# CHECK: %7:vgpr_32 = V_AND_B32_e32 %6, %1, implicit $exec
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# CHECK: %10:vgpr_32 = V_MAX_I32_e32 %9, %1, implicit $exec
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# CHECK: %13:vgpr_32 = V_MIN_I32_e32 %12, %1, implicit $exec
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# GCN-LABEL: name: nonzero_old_is_identity_masks_partially_disabled_bctl0
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# GCN: %4:vgpr_32 = V_MUL_U32_U24_e32 %3, %1, implicit $exec
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# GCN: %7:vgpr_32 = V_AND_B32_e32 %6, %1, implicit $exec
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# GCN: %10:vgpr_32 = V_MAX_I32_e32 %9, %1, implicit $exec
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# GCN: %13:vgpr_32 = V_MIN_I32_e32 %12, %1, implicit $exec
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name: nonzero_old_is_identity_masks_partially_disabled_bctl0
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tracksRegLiveness: true
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@@ -251,13 +251,13 @@ body: |
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...
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# when the DPP source isn't a src0 operand the operation should be commuted if possible
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# CHECK-LABEL: name: dpp_commute
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# CHECK: %4:vgpr_32 = V_MUL_U32_U24_dpp %1, %0, %1, 1, 14, 15, 0, implicit $exec
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# CHECK: %7:vgpr_32 = V_AND_B32_dpp %1, %0, %1, 1, 15, 14, 0, implicit $exec
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# CHECK: %10:vgpr_32 = V_MAX_I32_dpp %1, %0, %1, 1, 14, 15, 0, implicit $exec
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# CHECK: %13:vgpr_32 = V_MIN_I32_dpp %1, %0, %1, 1, 15, 14, 0, implicit $exec
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# CHECK: %16:vgpr_32 = V_SUBREV_I32_dpp %1, %0, %1, 1, 14, 15, 0, implicit-def $vcc, implicit $exec
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# CHECK: %19:vgpr_32 = V_ADD_I32_e32 5, %18, implicit-def $vcc, implicit $exec
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# GCN-LABEL: name: dpp_commute
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# GCN: %4:vgpr_32 = V_MUL_U32_U24_dpp %1, %0, %1, 1, 14, 15, 0, implicit $exec
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# GCN: %7:vgpr_32 = V_AND_B32_dpp %1, %0, %1, 1, 15, 14, 0, implicit $exec
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# GCN: %10:vgpr_32 = V_MAX_I32_dpp %1, %0, %1, 1, 14, 15, 0, implicit $exec
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# GCN: %13:vgpr_32 = V_MIN_I32_dpp %1, %0, %1, 1, 15, 14, 0, implicit $exec
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# GCN: %16:vgpr_32 = V_SUBREV_I32_dpp %1, %0, %1, 1, 14, 15, 0, implicit-def $vcc, implicit $exec
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# GCN: %19:vgpr_32 = V_ADD_I32_e32 5, %18, implicit-def $vcc, implicit $exec
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name: dpp_commute
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tracksRegLiveness: true
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body: |
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@@ -294,12 +294,12 @@ body: |
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...
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# check for floating point modifiers
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# CHECK-LABEL: name: add_f32_e64
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# CHECK: %3:vgpr_32 = V_MOV_B32_dpp undef %2, %1, 1, 15, 15, 1, implicit $exec
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# CHECK: %4:vgpr_32 = V_ADD_F32_e64 0, %3, 0, %0, 0, 1, implicit $exec
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# CHECK: %6:vgpr_32 = V_ADD_F32_dpp %2, 0, %1, 0, %0, 1, 15, 15, 1, implicit $exec
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# CHECK: %8:vgpr_32 = V_ADD_F32_dpp %2, 1, %1, 2, %0, 1, 15, 15, 1, implicit $exec
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# CHECK: %10:vgpr_32 = V_ADD_F32_e64 4, %9, 8, %0, 0, 0, implicit $exec
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# GCN-LABEL: name: add_f32_e64
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# GCN: %3:vgpr_32 = V_MOV_B32_dpp undef %2, %1, 1, 15, 15, 1, implicit $exec
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# GCN: %4:vgpr_32 = V_ADD_F32_e64 0, %3, 0, %0, 0, 1, implicit $exec
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# GCN: %6:vgpr_32 = V_ADD_F32_dpp %2, 0, %1, 0, %0, 1, 15, 15, 1, implicit $exec
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# GCN: %8:vgpr_32 = V_ADD_F32_dpp %2, 1, %1, 2, %0, 1, 15, 15, 1, implicit $exec
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# GCN: %10:vgpr_32 = V_ADD_F32_e64 4, %9, 8, %0, 0, 0, implicit $exec
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name: add_f32_e64
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tracksRegLiveness: true
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@@ -329,9 +329,9 @@ body: |
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...
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# check for e64 modifiers
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# CHECK-LABEL: name: add_u32_e64
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# CHECK: %4:vgpr_32 = V_ADD_U32_dpp %2, %0, %1, 1, 15, 15, 1, implicit $exec
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# CHECK: %6:vgpr_32 = V_ADD_U32_e64 %5, %1, 1, implicit $exec
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# GCN-LABEL: name: add_u32_e64
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# GCN: %4:vgpr_32 = V_ADD_U32_dpp %2, %0, %1, 1, 15, 15, 1, implicit $exec
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# GCN: %6:vgpr_32 = V_ADD_U32_e64 %5, %1, 1, implicit $exec
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name: add_u32_e64
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tracksRegLiveness: true
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@@ -353,12 +353,12 @@ body: |
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...
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# tests on sequences of dpp consumers
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# CHECK-LABEL: name: dpp_seq
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# CHECK: %4:vgpr_32 = V_ADD_I32_dpp %1, %0, %1, 1, 14, 15, 0, implicit-def $vcc, implicit $exec
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# CHECK: %5:vgpr_32 = V_SUBREV_I32_dpp %1, %0, %1, 1, 14, 15, 0, implicit-def $vcc, implicit $exec
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# CHECK: %6:vgpr_32 = V_OR_B32_dpp %1, %0, %1, 1, 14, 15, 0, implicit $exec
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# GCN-LABEL: name: dpp_seq
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# GCN: %4:vgpr_32 = V_ADD_I32_dpp %1, %0, %1, 1, 14, 15, 0, implicit-def $vcc, implicit $exec
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# GCN: %5:vgpr_32 = V_SUBREV_I32_dpp %1, %0, %1, 1, 14, 15, 0, implicit-def $vcc, implicit $exec
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# GCN: %6:vgpr_32 = V_OR_B32_dpp %1, %0, %1, 1, 14, 15, 0, implicit $exec
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# broken sequence:
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# CHECK: %7:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 14, 15, 0, implicit $exec
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# GCN: %7:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 14, 15, 0, implicit $exec
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name: dpp_seq
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tracksRegLiveness: true
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@@ -381,10 +381,10 @@ body: |
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...
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# tests on sequences of dpp consumers followed by control flow
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# CHECK-LABEL: name: dpp_seq_cf
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# CHECK: %4:vgpr_32 = V_ADD_I32_dpp %1, %0, %1, 1, 14, 15, 0, implicit-def $vcc, implicit $exec
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# CHECK: %5:vgpr_32 = V_SUBREV_I32_dpp %1, %0, %1, 1, 14, 15, 0, implicit-def $vcc, implicit $exec
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# CHECK: %6:vgpr_32 = V_OR_B32_dpp %1, %0, %1, 1, 14, 15, 0, implicit $exec
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# GCN-LABEL: name: dpp_seq_cf
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# GCN: %4:vgpr_32 = V_ADD_I32_dpp %1, %0, %1, 1, 14, 15, 0, implicit-def $vcc, implicit $exec
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# GCN: %5:vgpr_32 = V_SUBREV_I32_dpp %1, %0, %1, 1, 14, 15, 0, implicit-def $vcc, implicit $exec
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# GCN: %6:vgpr_32 = V_OR_B32_dpp %1, %0, %1, 1, 14, 15, 0, implicit $exec
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name: dpp_seq_cf
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tracksRegLiveness: true
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@@ -413,8 +413,8 @@ body: |
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...
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# old reg def is in diff BB - cannot combine
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# CHECK-LABEL: name: old_in_diff_bb
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# CHECK: %3:vgpr_32 = V_MOV_B32_dpp %2, %1, 1, 1, 1, 0, implicit $exec
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# GCN-LABEL: name: old_in_diff_bb
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# GCN: %3:vgpr_32 = V_MOV_B32_dpp %2, %1, 1, 1, 1, 0, implicit $exec
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name: old_in_diff_bb
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tracksRegLiveness: true
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@@ -434,8 +434,8 @@ body: |
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...
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# old reg def is in diff BB but bound_ctrl:0 - can combine
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# CHECK-LABEL: name: old_in_diff_bb_bctrl_zero
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# CHECK: %4:vgpr_32 = V_ADD_U32_dpp {{%[0-9]}}, %0, %1, 1, 15, 15, 1, implicit $exec
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# GCN-LABEL: name: old_in_diff_bb_bctrl_zero
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# GCN: %4:vgpr_32 = V_ADD_U32_dpp {{%[0-9]}}, %0, %1, 1, 15, 15, 1, implicit $exec
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name: old_in_diff_bb_bctrl_zero
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tracksRegLiveness: true
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@@ -455,8 +455,8 @@ body: |
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...
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# EXEC mask changed between def and use - cannot combine
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# CHECK-LABEL: name: exec_changed
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# CHECK: %3:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 15, 15, 1, implicit $exec
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# GCN-LABEL: name: exec_changed
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# GCN: %3:vgpr_32 = V_MOV_B32_dpp %2, %0, 1, 15, 15, 1, implicit $exec
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name: exec_changed
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tracksRegLiveness: true
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@@ -475,8 +475,8 @@ body: |
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# test if $old definition is correctly tracked through subreg manipulation pseudos
|
||||
|
||||
# CHECK-LABEL: name: mul_old_subreg
|
||||
# CHECK: %7:vgpr_32 = V_MUL_I32_I24_dpp %0.sub1, %1, %0.sub1, 1, 1, 1, 0, implicit $exec
|
||||
# GCN-LABEL: name: mul_old_subreg
|
||||
# GCN: %7:vgpr_32 = V_MUL_I32_I24_dpp %0.sub1, %1, %0.sub1, 1, 1, 1, 0, implicit $exec
|
||||
|
||||
name: mul_old_subreg
|
||||
tracksRegLiveness: true
|
||||
@@ -494,8 +494,8 @@ body: |
|
||||
%7:vgpr_32 = V_MUL_I32_I24_e32 %6, %0.sub1, implicit $exec
|
||||
...
|
||||
|
||||
# CHECK-LABEL: name: add_old_subreg
|
||||
# CHECK: %5:vgpr_32 = V_ADD_U32_dpp %0.sub1, %1, %0.sub1, 1, 1, 1, 0, implicit $exec
|
||||
# GCN-LABEL: name: add_old_subreg
|
||||
# GCN: %5:vgpr_32 = V_ADD_U32_dpp %0.sub1, %1, %0.sub1, 1, 1, 1, 0, implicit $exec
|
||||
|
||||
name: add_old_subreg
|
||||
tracksRegLiveness: true
|
||||
@@ -511,8 +511,8 @@ body: |
|
||||
%5:vgpr_32 = V_ADD_U32_e32 %4, %0.sub1, implicit $exec
|
||||
...
|
||||
|
||||
# CHECK-LABEL: name: add_old_subreg_undef
|
||||
# CHECK: %5:vgpr_32 = V_ADD_U32_dpp undef %3.sub1, %1, %0.sub1, 1, 15, 15, 1, implicit $exec
|
||||
# GCN-LABEL: name: add_old_subreg_undef
|
||||
# GCN: %5:vgpr_32 = V_ADD_U32_dpp undef %3.sub1, %1, %0.sub1, 1, 15, 15, 1, implicit $exec
|
||||
|
||||
name: add_old_subreg_undef
|
||||
tracksRegLiveness: true
|
||||
@@ -529,8 +529,8 @@ body: |
|
||||
...
|
||||
|
||||
# Test instruction which does not have modifiers in VOP1 form but does in DPP form.
|
||||
# CHECK-LABEL: name: dpp_vop1
|
||||
# CHECK: %3:vgpr_32 = V_CEIL_F32_dpp %0, 0, undef %2:vgpr_32, 1, 15, 15, 1, implicit $exec
|
||||
# GCN-LABEL: name: dpp_vop1
|
||||
# GCN: %3:vgpr_32 = V_CEIL_F32_dpp %0, 0, undef %2:vgpr_32, 1, 15, 15, 1, implicit $exec
|
||||
name: dpp_vop1
|
||||
tracksRegLiveness: true
|
||||
body: |
|
||||
@@ -541,8 +541,8 @@ body: |
|
||||
...
|
||||
|
||||
# Test instruction which does not have modifiers in VOP2 form but does in DPP form.
|
||||
# CHECK-LABEL: name: dpp_min
|
||||
# CHECK: %3:vgpr_32 = V_MIN_F32_dpp %0, 0, undef %2:vgpr_32, 0, undef %4:vgpr_32, 1, 15, 15, 1, implicit $exec
|
||||
# GCN-LABEL: name: dpp_min
|
||||
# GCN: %3:vgpr_32 = V_MIN_F32_dpp %0, 0, undef %2:vgpr_32, 0, undef %4:vgpr_32, 1, 15, 15, 1, implicit $exec
|
||||
name: dpp_min
|
||||
tracksRegLiveness: true
|
||||
body: |
|
||||
@@ -553,8 +553,8 @@ body: |
|
||||
...
|
||||
|
||||
# Test an undef old operand
|
||||
# CHECK-LABEL: name: dpp_undef_old
|
||||
# CHECK: %3:vgpr_32 = V_CEIL_F32_dpp undef %1:vgpr_32, 0, undef %2:vgpr_32, 1, 15, 15, 1, implicit $exec
|
||||
# GCN-LABEL: name: dpp_undef_old
|
||||
# GCN: %3:vgpr_32 = V_CEIL_F32_dpp undef %1:vgpr_32, 0, undef %2:vgpr_32, 1, 15, 15, 1, implicit $exec
|
||||
name: dpp_undef_old
|
||||
tracksRegLiveness: true
|
||||
body: |
|
||||
|
||||
Reference in New Issue
Block a user