mirror of
https://github.com/RPCS3/llvm.git
synced 2024-12-19 09:57:42 +00:00
Few targets like PIC16 wants libcall generation for illegal type i16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62467 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
2cb560f6ef
commit
15c94d08ab
@ -29,15 +29,19 @@ namespace RTLIB {
|
||||
///
|
||||
enum Libcall {
|
||||
// Integer
|
||||
SHL_I16,
|
||||
SHL_I32,
|
||||
SHL_I64,
|
||||
SHL_I128,
|
||||
SRL_I16,
|
||||
SRL_I32,
|
||||
SRL_I64,
|
||||
SRL_I128,
|
||||
SRA_I16,
|
||||
SRA_I32,
|
||||
SRA_I64,
|
||||
SRA_I128,
|
||||
MUL_I16,
|
||||
MUL_I32,
|
||||
MUL_I64,
|
||||
MUL_I128,
|
||||
|
@ -1586,7 +1586,9 @@ void DAGTypeLegalizer::ExpandIntRes_MUL(SDNode *N,
|
||||
|
||||
// If nothing else, we can make a libcall.
|
||||
RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
|
||||
if (VT == MVT::i32)
|
||||
if (VT == MVT::i16)
|
||||
LC = RTLIB::MUL_I16;
|
||||
else if (VT == MVT::i32)
|
||||
LC = RTLIB::MUL_I32;
|
||||
else if (VT == MVT::i64)
|
||||
LC = RTLIB::MUL_I64;
|
||||
@ -1662,7 +1664,9 @@ void DAGTypeLegalizer::ExpandIntRes_Shift(SDNode *N,
|
||||
bool isSigned;
|
||||
if (N->getOpcode() == ISD::SHL) {
|
||||
isSigned = false; /*sign irrelevant*/
|
||||
if (VT == MVT::i32)
|
||||
if (VT == MVT::i16)
|
||||
LC = RTLIB::SHL_I16;
|
||||
else if (VT == MVT::i32)
|
||||
LC = RTLIB::SHL_I32;
|
||||
else if (VT == MVT::i64)
|
||||
LC = RTLIB::SHL_I64;
|
||||
@ -1670,7 +1674,9 @@ void DAGTypeLegalizer::ExpandIntRes_Shift(SDNode *N,
|
||||
LC = RTLIB::SHL_I128;
|
||||
} else if (N->getOpcode() == ISD::SRL) {
|
||||
isSigned = false;
|
||||
if (VT == MVT::i32)
|
||||
if (VT == MVT::i16)
|
||||
LC = RTLIB::SRL_I16;
|
||||
else if (VT == MVT::i32)
|
||||
LC = RTLIB::SRL_I32;
|
||||
else if (VT == MVT::i64)
|
||||
LC = RTLIB::SRL_I64;
|
||||
@ -1679,7 +1685,9 @@ void DAGTypeLegalizer::ExpandIntRes_Shift(SDNode *N,
|
||||
} else {
|
||||
assert(N->getOpcode() == ISD::SRA && "Unknown shift!");
|
||||
isSigned = true;
|
||||
if (VT == MVT::i32)
|
||||
if (VT == MVT::i16)
|
||||
LC = RTLIB::SRA_I16;
|
||||
else if (VT == MVT::i32)
|
||||
LC = RTLIB::SRA_I32;
|
||||
else if (VT == MVT::i64)
|
||||
LC = RTLIB::SRA_I64;
|
||||
|
@ -29,15 +29,19 @@ using namespace llvm;
|
||||
/// InitLibcallNames - Set default libcall names.
|
||||
///
|
||||
static void InitLibcallNames(const char **Names) {
|
||||
Names[RTLIB::SHL_I16] = "__ashli16";
|
||||
Names[RTLIB::SHL_I32] = "__ashlsi3";
|
||||
Names[RTLIB::SHL_I64] = "__ashldi3";
|
||||
Names[RTLIB::SHL_I128] = "__ashlti3";
|
||||
Names[RTLIB::SRL_I16] = "__lshri16";
|
||||
Names[RTLIB::SRL_I32] = "__lshrsi3";
|
||||
Names[RTLIB::SRL_I64] = "__lshrdi3";
|
||||
Names[RTLIB::SRL_I128] = "__lshrti3";
|
||||
Names[RTLIB::SRA_I16] = "__ashri16";
|
||||
Names[RTLIB::SRA_I32] = "__ashrsi3";
|
||||
Names[RTLIB::SRA_I64] = "__ashrdi3";
|
||||
Names[RTLIB::SRA_I128] = "__ashrti3";
|
||||
Names[RTLIB::MUL_I16] = "__muli16";
|
||||
Names[RTLIB::MUL_I32] = "__mulsi3";
|
||||
Names[RTLIB::MUL_I64] = "__muldi3";
|
||||
Names[RTLIB::MUL_I128] = "__multi3";
|
||||
|
Loading…
Reference in New Issue
Block a user