RPCS3/llvm
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm.git synced 2025-04-04 06:12:18 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

[AVX512] Fix cvtusi2sd instruction Opcode, it should be 0x7B instead of 0x2A.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272122 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Igor Breger 2016-06-08 07:48:23 +00:00
parent c9cf0c849e
commit 1e48871118
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
lib/Target/X86/X86InstrAVX512.td
View File

@ -5097,7 +5097,7 @@ let isCodeGenOnly = 1 , Predicates = [HasAVX512] in {
int_x86_sse2_cvtsi642sd, i64mem, loadi64, "cvtsi2sd{q}",
SSE_CVT_Scalar, 0>, XD, EVEX_4V, VEX_W;
defm Int_VCVTUSI2SDZ : sse12_cvt_sint_3addr<0x2A, GR32, VR128X,
defm Int_VCVTUSI2SDZ : sse12_cvt_sint_3addr<0x7B, GR32, VR128X,
int_x86_avx512_cvtusi2sd, i32mem, loadi32, "cvtusi2sd{l}",
SSE_CVT_Scalar, 0>, XD, EVEX_4V;
} // isCodeGenOnly = 1, Predicates = [HasAVX512]