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Add support for fmul node of type v4f32.
void %foo(<4 x float> * %a) { entry: %tmp1 = load <4 x float> * %a; %tmp2 = mul <4 x float> %tmp1, %tmp1 store <4 x float> %tmp2, <4 x float> *%a ret void } Is selected to: _foo: li r2, 0 lvx v0, r2, r3 vxor v1, v1, v1 vmaddfp v0, v0, v0, v1 stvx v0, r2, r3 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24701 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -602,6 +602,14 @@ class VXForm_1<bits<11> xo, dag OL, string asmstr,
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let Inst{21-31} = xo;
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let Inst{21-31} = xo;
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}
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}
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class VXForm_setzero<bits<11> xo, dag OL, string asmstr,
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InstrItinClass itin, list<dag> pattern>
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: VXForm_1<xo, OL, asmstr, itin, pattern> {
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let VA = VD;
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let VB = VD;
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}
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class VXForm_2<bits<11> xo, dag OL, string asmstr,
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class VXForm_2<bits<11> xo, dag OL, string asmstr,
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InstrItinClass itin, list<dag> pattern>
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InstrItinClass itin, list<dag> pattern>
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: I<4, OL, asmstr, itin> {
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: I<4, OL, asmstr, itin> {
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@ -897,6 +897,16 @@ def VRSQRTEFP : VXForm_2<330, (ops VRRC:$vD, VRRC:$vB),
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def VSUBFP : VXForm_1<74, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
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def VSUBFP : VXForm_1<74, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
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"vsubfp $vD, $vA, $vB", VecFP,
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"vsubfp $vD, $vA, $vB", VecFP,
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[(set VRRC:$vD, (fsub VRRC:$vA, VRRC:$vB))]>;
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[(set VRRC:$vD, (fsub VRRC:$vA, VRRC:$vB))]>;
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def VXOR : VXForm_1<1220, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
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"vxor $vD, $vA, $vB", VecFP,
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[]>;
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// VX-Form Pseudo Instructions
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def V_SET0 : VXForm_setzero<1220, (ops VRRC:$vD),
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"vxor $vD, $vD, $vD", VecFP,
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[]>;
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// PowerPC Instruction Patterns
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// PowerPC Instruction Patterns
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@ -951,6 +961,9 @@ def : Pat<(add GPRC:$in, (PPChi tglobaladdr:$g, 0)),
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def : Pat<(add GPRC:$in, (PPChi tconstpool:$g, 0)),
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def : Pat<(add GPRC:$in, (PPChi tconstpool:$g, 0)),
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(ADDIS GPRC:$in, tconstpool:$g)>;
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(ADDIS GPRC:$in, tconstpool:$g)>;
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def : Pat<(fmul VRRC:$vA, VRRC:$vB),
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(VMADDFP VRRC:$vA, (V_SET0), VRRC:$vB)>;
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// Fused multiply add and multiply sub for packed float. These are represented
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// Fused multiply add and multiply sub for packed float. These are represented
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// separately from the real instructions above, for operations that must have
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// separately from the real instructions above, for operations that must have
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// the additional precision, such as Newton-Rhapson (used by divide, sqrt)
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// the additional precision, such as Newton-Rhapson (used by divide, sqrt)
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