Fix uninitialized read in ARM's PrintAsmOperand

Summary:
Fix read of uninitialized RC variable in ARM's PrintAsmOperand when
hasRegClassConstraint returns false. This was causing
inline-asm-operand-implicit-cast test to fail in r338206.

Reviewers: t.p.northover, weimingz, javed.absar, chill

Reviewed By: chill

Subscribers: chill, eraman, kristof.beyls, chrib, llvm-commits

Differential Revision: https://reviews.llvm.org/D49984

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338268 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Thomas Preud'homme
2018-07-30 16:45:40 +00:00
parent 1453140bcb
commit 690afef84f
2 changed files with 11 additions and 2 deletions
+3 -2
View File
@@ -367,8 +367,9 @@ bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
unsigned NumVals = InlineAsm::getNumOperandRegisters(Flags);
unsigned RC;
InlineAsm::hasRegClassConstraint(Flags, RC);
if (RC == ARM::GPRPairRegClassID) {
const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
if (InlineAsm::hasRegClassConstraint(Flags, RC) &&
ARM::GPRPairRegClass.hasSubClassEq(TRI->getRegClass(RC))) {
if (NumVals != 1)
return true;
const MachineOperand &MO = MI->getOperand(OpNum);
+8
View File
@@ -104,3 +104,11 @@ define i64 @tied_64bit_lookback_test(i64 %in) nounwind {
%res = extractvalue {i64, i32, i64} %vars, 2
ret i64 %res
}
; Check access to low and high part with a specific register pair constraint
define i64 @low_high_specific_reg_pair(i64 %in) nounwind {
; CHECK-LABEL: low_high_specific_reg_pair
; CHECK: mov r3, r2
%res = call i64 asm "mov ${0:R}, ${1:Q}", "=&{r2},0"(i64 %in)
ret i64 %res
}